公开(公告)号：US20200227568A1

公开(公告)日：2020-07-16

申请号：US16638301

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Van H. LE ,  Abhishek A. SHARMA ,  Benjamin CHU-KUNG ,  Gilbert DEWEY ,  Ravi PILLARISETTY ,  Miriam R. RESHOTKO ,  Shriram SHIVARAMAN ,  Li Huey TAN ,  Tristan A. TRONIC ,  Jack T. KAVALIEROS

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/40

Abstract: Embodiments herein describe techniques for a semiconductor device, which may include a substrate, and a U-shaped channel above the substrate. The U-shaped channel may include a channel bottom, a first channel wall and a second channel wall parallel to each other, a source area, and a drain area. A gate dielectric layer may be above the substrate and in contact with the channel bottom. A gate electrode may be above the substrate and in contact with the gate dielectric layer. A source electrode may be coupled to the source area, and a drain electrode may be coupled to the drain area. Other embodiments may be described and/or claimed.