公开(公告)号：US11172016B2

公开(公告)日：2021-11-09

申请号：US15474833

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Karl P. Brummel ,  Charles A. Giefer ,  Nathan S. Miller ,  Keith D. Underwood

IPC: H04L29/08 ,  H04L12/801 ,  H04L12/823 ,  H04L12/851 ,  H04L12/807 ,  H04L12/835

Abstract: A computing device, a method, and a system to enforce concurrency limits within a network fabric. The computing device includes a memory device; and a network interface controller coupled to the memory device. The network interface controller includes circuitry to communicate with a plurality of target computing devices in a network fabric. The circuitry is configured to generate packets for transmission to respective ones of a plurality of target nodes. For each packet addressed to its corresponding target node, the circuitry is to determine whether transmitting the packet would violate the target node's concurrency limit. If transmitting the packet would not violate the target node's concurrency limit, the circuitry is to transmit the packet to the target node. However, if transmitting the packet would violate the target node's concurrency limit, the circuitry would store the packet in a retransmit buffer of the computing device, where the retransmit buffer is to further store already transmitted packets flagged for retransmission. The circuitry would then transmit the packet from the retransmit buffer when transmitting the packet from the retransmit buffer would not violate the target node's concurrency limit.

公开(公告)号：US20180287904A1

公开(公告)日：2018-10-04

申请号：US15474833

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Karl P. Brummel ,  Charles A. Giefer ,  Nathan S. Miller ,  Keith D. Underwood

IPC: H04L12/26 ,  H04L29/08

Abstract: A computing device, a method, and a system to enforce concurrency limits within a network fabric. The computing device includes a memory device; and a network interface controller coupled to the memory device. The network interface controller includes circuitry to communicate with a plurality of target computing devices in a network fabric. The circuitry is configured to generate packets for transmission to respective ones of a plurality of target nodes. For each packet addressed to its corresponding target node, the circuitry is to determine whether transmitting the packet would violate the target node's concurrency limit. If transmitting the packet would not violate the target node's concurrency limit, the circuitry is to transmit the packet to the target node. However, if transmitting the packet would violate the target node's concurrency limit, the circuitry would store the packet in a retransmit buffer of the computing device, where the retransmit buffer is to further store already transmitted packets flagged for retransmission. The circuitry would then transmit the packet from the retransmit buffer when transmitting the packet from the retransmit buffer would not violate the target node's concurrency limit.