公开(公告)号：US20160378133A1

公开(公告)日：2016-12-29

申请号：US14751875

申请日：2015-06-26

Applicant: Intel Corporation

Inventor： Alexander Gendler ,  Kosta Luria ,  Arye Albahari ,  Ohad Nachshon

IPC: G06F1/10 ,  G01R19/165

CPC classification number: G06F1/08 ,  G01R1/203 ,  G01R19/0092 ,  G01R19/16528 ,  G01R19/16533 ,  G06F1/06 ,  G06F1/26

Abstract: A method and apparatus for performing current control for an integrated circuit are described. In one embodiment the apparatus comprises core logic coupled to receive a first current; a clock generator to generate a first clock signal; and a closed loop current controller coupled to the clock generator and coupled to provide a second clock signal to the core logic based on the first clock signal, the current controller to control an amount of the first current received by the core logic by changing the first clock signal to generate the second clock signal.

Abstract translation: 描述用于对集成电路进行电流控制的方法和装置。 在一个实施例中，该装置包括耦合以接收第一电流的核心逻辑; 时钟发生器，用于产生第一时钟信号; 以及闭环电流控制器，其耦合到所述时钟发生器并被耦合以基于所述第一时钟信号向所述核心逻辑提供第二时钟信号，所述电流控制器通过改变所述第一时钟信号来控制由所述核心逻辑接收的所述第一电流的量 时钟信号以产生第二时钟信号。

公开(公告)号：US09612613B2

公开(公告)日：2017-04-04

申请号：US14751875

申请日：2015-06-26

Applicant: Intel Corporation

Inventor： Alexander Gendler ,  Kosta Luria ,  Arye Albahari ,  Ohad Nachshon

IPC: G06F1/10 ,  G01R19/165

CPC classification number: G06F1/08 ,  G01R1/203 ,  G01R19/0092 ,  G01R19/16528 ,  G01R19/16533 ,  G06F1/06 ,  G06F1/26

Abstract: A method and apparatus for performing current control for an integrated circuit are described. In one embodiment the apparatus comprises core logic coupled to receive a first current; a clock generator to generate a first clock signal; and a closed loop current controller coupled to the clock generator and coupled to provide a second clock signal to the core logic based on the first clock signal, the current controller to control an amount of the first current received by the core logic by changing the first clock signal to generate the second clock signal.

公开(公告)号：US10705559B2

公开(公告)日：2020-07-07

申请号：US16189973

申请日：2018-11-13

Applicant: Intel Corporation

Inventor： Alexander Gendler ,  Kosta Luria ,  Arye Albahari ,  Ohad Nachshon

IPC: G06F1/08 ,  G06F1/3206 ,  G06F1/3296 ,  G06F1/324 ,  G01R19/165 ,  G06F1/06 ,  G06F1/26 ,  G01R1/20 ,  G01R19/00

Abstract: A method and apparatus for performing current control for an integrated circuit are described. In one embodiment the apparatus comprises core logic coupled to receive a first current; a clock generator to generate a first clock signal; and a closed loop current controller coupled to the clock generator and coupled to provide a second clock signal to the core logic based on the first clock signal, the current controller to control an amount of the first current received by the core logic by changing the first clock signal to generate the second clock signal.

公开(公告)号：US10126775B2

公开(公告)日：2018-11-13

申请号：US15448332

申请日：2017-03-02

Applicant: Intel Corporation

Inventor： Alexander Gendler ,  Kosta Luria ,  Arye Albahari ,  Ohad Nachshon

IPC: G06F1/08 ,  G01R19/165 ,  G06F1/06 ,  G06F1/26 ,  G01R1/20 ,  G01R19/00

Abstract: A method and apparatus for performing current control for an integrated circuit are described. In one embodiment the apparatus comprises core logic coupled to receive a first current; a clock generator to generate a first clock signal; and a closed loop current controller coupled to the clock generator and coupled to provide a second clock signal to the core logic based on the first clock signal, the current controller to control an amount of the first current received by the core logic by changing the first clock signal to generate the second clock signal.

公开(公告)号：US20170177022A1

公开(公告)日：2017-06-22

申请号：US15448332

申请日：2017-03-02

Applicant: Intel Corporation

Inventor： Alexander Gendler ,  Kosta Luria ,  Arye Albahari ,  Ohad Nachshon

IPC: G06F1/08 ,  G06F1/26 ,  G01R19/165 ,  G06F1/06

CPC classification number: G06F1/08 ,  G01R1/203 ,  G01R19/0092 ,  G01R19/16528 ,  G01R19/16533 ,  G06F1/06 ,  G06F1/26

Abstract: A method and apparatus for performing current control for an integrated circuit are described. In one embodiment the apparatus comprises core logic coupled to receive a first current; a clock generator to generate a first clock signal; and a closed loop current controller coupled to the clock generator and coupled to provide a second clock signal to the core logic based on the first clock signal, the current controller to control an amount of the first current received by the core logic by changing the first clock signal to generate the second clock signal.