公开(公告)号：US20230098331A1

公开(公告)日：2023-03-30

申请号：US17485384

申请日：2021-09-25

Applicant: Intel Corporation

Inventor： Vinodh Gopal ,  James David Guilford ,  Otto Bruggeman

IPC: G06F16/245

Abstract: Embodiments of apparatuses, methods, and systems for a complex filter hardware accelerator are disclosed. In an embodiment, an apparatus includes a plurality of set membership definition units and set lookup request generator hardware. Each set membership definition unit has a memory to store a definition indicator per input value. Each definition indicator is to indicate whether a corresponding input value corresponds to membership in a set. Each input value is to have a fixed width, in bits, less than an element width, in bits, of each set member. The set lookup request generator hardware is to access one of the plurality of set membership definition units. Which one of the plurality of set membership definition units to be accessed is to be determined based on an offset value. The offset value is to have an offset width, in bits, equal to the element width minus the fixed width.