公开(公告)号：US20240422899A1

公开(公告)日：2024-12-19

申请号：US18335145

申请日：2023-06-15

Applicant: Intel Corporation

Inventor： Srinivas B REDDY ,  Jayprakash THAKUR ,  Arvind S ,  Rajasekar A ,  Bindu Prabhakar RAO ,  Pali BARMATE

IPC: H05K1/02 ,  H05K1/03 ,  H05K3/46

Abstract: The present disclosure generally relates to a multi-layer printed circuit board. The multi-layer printed circuit board may include a core layer and a first prepreg layer adjacent the core layer. The core layer may include a first biodegradable material sandwiched between two electrically conducting layers. A method for forming a multi-layer printed circuit board is also provided herein.

公开(公告)号：US20240387340A1

公开(公告)日：2024-11-21

申请号：US18318755

申请日：2023-05-17

Applicant: Intel Corporation

Inventor： Jaydeep Ramniklal PARMAR ,  Pali BARMATE ,  Tamilarasi PONNUSAMY

IPC: H01L23/498 ,  H01L21/48

Abstract: The present disclosure is directed to a package substrate having surface layers with a power region for coupling with a semiconductor device, base layers of the package substrate, and a plurality of through hole vias providing direct couplings between the surface layers with the base layers, for which the surface layers and the base layer are provided with micro vias and the plurality of through hole vias are located below the power region of the surface layer. In an aspect, the package substrate includes a first and second plurality of plane layers, for which the first and second plurality of plane layers are without micro vias.