公开(公告)号：US10282300B2

公开(公告)日：2019-05-07

申请号：US15652157

申请日：2017-07-17

Applicant: Intel Corporation

Inventor： Sanjoy K. Mondal ,  Rajesh B. Patel ,  Lawrence O. Smith

IPC: G06F9/30 ,  G06F12/0862 ,  G06F12/10 ,  G06F12/1027 ,  G06F12/0888

Abstract: A method and apparatus is described herein for accessing a physical memory location referenced by a physical address with a processor. The processor fetches/receives instructions with references to virtual memory addresses and/or references to physical addresses. Translation logic translates the virtual memory addresses to physical addresses and provides the physical addresses to a common interface. Physical addressing logic decodes references to physical addresses and provides the physical addresses to a common interface based on a memory type stored by the physical addressing logic.

公开(公告)号：US09710385B2

公开(公告)日：2017-07-18

申请号：US13795247

申请日：2013-03-12

Applicant: Intel Corporation

Inventor： Sanjoy K. Mondal ,  Rajesh B. Patel ,  Lawrence O. Smith

IPC: G06F12/00 ,  G06F12/0862 ,  G06F9/30 ,  G06F12/10 ,  G06F12/1027 ,  G06F12/0888

CPC classification number: G06F12/0862 ,  G06F9/30149 ,  G06F9/3016 ,  G06F9/30181 ,  G06F12/0888 ,  G06F12/10 ,  G06F12/1027

Abstract: A method and apparatus is described herein for accessing a physical memory location referenced by a physical address with a processor. The processor fetches/receives instructions with references to virtual memory addresses and/or references to physical addresses. Translation logic translates the virtual memory addresses to physical addresses and provides the physical addresses to a common interface. Physical addressing logic decodes references to physical addresses and provides the physical addresses to a common interface based on a memory type stored by the physical addressing logic.