公开(公告)号：US20230315453A1

公开(公告)日：2023-10-05

申请号：US17712018

申请日：2022-04-01

Applicant: Intel Corporation

Inventor： Ahmad YASIN ,  Lihu RAPPOPORT ,  Nir TELL ,  Rami BUSOOL ,  Eyal HADAS ,  Michael CHYNOWETH ,  Joseph OLIVAS ,  Christopher M. CHRULSKI

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30058 ,  G06F9/3867

Abstract: An instruction pipeline includes a circuit that can generate a hardware event to indicate conditional branches, including the direction of taken branches. The circuit can generate a forward conditional branch indicator for an opcode when a conditional branch is taken to a forward location from the opcode. The instruction pipeline includes a counter to increment in response to the forward conditional branch indicator, which will indicate a frequency of forward conditional branches for the opcode.