公开(公告)号：US20170235228A1

公开(公告)日：2017-08-17

申请号：US15504469

申请日：2014-09-22

Applicant: Intel Corporation

Inventor： Manish CHANDHOK ,  Todd R. YOUNKIN ,  Sang H. LEE ,  Charles H. WALLACE

IPC: G03F7/20 ,  H01L21/033 ,  H01L21/311 ,  H01L21/027

Abstract: Techniques related to multi-pass patterning lithography, device structures, and devices formed using such techniques are discussed. Such techniques include exposing a resist layer disposed over a grating pattern with non-reflecting radiation to generate an enhanced exposure portion within a trench of the grating pattern and developing the resist layer to form a pattern layer having a pattern structure within the trench of the grating pattern.