公开(公告)号：US20230350674A1

公开(公告)日：2023-11-02

申请号：US18220225

申请日：2023-07-10

Applicant: Intel Corporation

Inventor： Edward T. GROCHOWSKI ,  Asit K. MISHRA ,  Robert VALENTINE ,  Mark J. CHARNEY ,  Simon C. STEELY

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3001 ,  G06F9/3865 ,  G06F9/30036 ,  G06F9/3861 ,  G06F9/30145

Abstract: A processor of an aspect includes a decode unit to decode a matrix multiplication instruction. The matrix multiplication instruction is to indicate a first memory location of a first source matrix, is to indicate a second memory location of a second source matrix, and is to indicate a third memory location where a result matrix is to be stored. The processor also includes an execution unit coupled with the decode unit. The execution unit, in response to the matrix multiplication instruction, is to multiply a portion of the first and second source matrices prior to an interruption, and store a completion progress indicator in response to the interruption. The completion progress indicator to indicate an amount of progress in multiplying the first and second source matrices, and storing corresponding result data to the third memory location, that is to have been completed prior to the interruption.

公开(公告)号：US20220107911A1

公开(公告)日：2022-04-07

申请号：US17550875

申请日：2021-12-14

Applicant: Intel Corporation

Inventor： Kermin E. FLEMING ,  Simon C. STEELY ,  Kent D. GLOSSOP ,  Mitchell DIAMOND ,  Benjamin KEEN ,  Dennis BRADFORD ,  Fabrizio Petrini ,  Barry TANNENBAUM ,  Yongzhi ZHANG

IPC: G06F13/40 ,  G06F9/30 ,  G06F15/78

Abstract: Systems, methods, and apparatuses relating to operations in a configurable spatial accelerator are described. In one embodiment, a configurable spatial accelerator includes a first processing element that includes a configuration register within the first processing element to store a configuration value that causes the first processing element to perform an operation according to the configuration value, a plurality of input queues, an input controller to control enqueue and dequeue of values into the plurality of input queues according to the configuration value, a plurality of output queues, and an output controller to control enqueue and dequeue of values into the plurality of output queues according to the configuration value.