公开(公告)号：US20220109610A1

公开(公告)日：2022-04-07

申请号：US17555109

申请日：2021-12-17

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Marcos Carranza ,  Cesar Martinez-Spessot ,  Han Lee

IPC: H04L41/0896 ,  H04L41/5022 ,  H04L41/5006 ,  H04L41/12

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to orchestrate intermittent surplus power in Edge networks. An example apparatus includes power unit analysis circuitry to identify a power surplus, analysis circuitry to (a) apply an acceleration factor to a first trigger threshold of a local task, the acceleration factor to set a second trigger threshold, and (b) designate the local task for early execution when a current metric corresponding to the local task satisfies the second trigger threshold, and adaptive power managing circuitry to execute the local task in response to detecting the designation for early execution.

公开(公告)号：US10445118B2

公开(公告)日：2019-10-15

申请号：US15713301

申请日：2017-09-22

Applicant: Intel Corporation

Inventor： Xiangyang Guo ,  Simonjit Dutta ,  Han Lee ,  Yipeng Wang

IPC: G06F9/44 ,  G06F9/455 ,  G06F8/41

Abstract: Methods, apparatus, systems, and articles of manufacture to facilitate field-programmable gate array support during runtime execution of computer readable instructions are disclosed herein. An example apparatus includes a compiler to, prior to runtime, compile a block of code written as high level source code into a first hardware bitstream kernel and a second hardware bitstream kernel; a kernel selector to select the first hardware bitstream kernel based on an attribute to be dispatched during runtime; a dispatcher to dispatch the first hardware bitstream kernel to a field programmable gate array (FPGA) during runtime; and the kernel selector to, when an FPGA attribute does not satisfy a threshold during runtime, adjust the selection of the first hardware bitstream kernel to the second hardware bitstream kernel to be dispatched during runtime.