公开(公告)号：US20190129880A1

公开(公告)日：2019-05-02

申请号：US16234081

申请日：2018-12-27

Applicant: Intel Corporation

Inventor： Zhenyu Zhu ,  Joel L. Finkel ,  Lean Kim Ong ,  Siow Hoay Lim ,  Mikal Hunsaker

IPC: G06F13/40 ,  G06F13/42

Abstract: Apparatuses and methods relating to an enhanced serial peripheral interface (eSPI) port expander circuitry are described. In an embodiment, an apparatus includes an upstream eSPI port, a plurality of downstream eSPI ports, and an eSPI aggregator. The upstream eSPI port is to operate as an eSPI slave on an upstream eSPI bus. Each of the plurality of downstream eSPI ports is to operate as an eSPI master on a corresponding one of a plurality of downstream eSPI buses. The eSPI aggregator is to forward or broadcast transactions from the upstream eSPI bus to one or more of the plurality of downstream eSPI buses and to aggregate responses from one or more of the downstream eSPI buses.

公开(公告)号：US11188492B2

公开(公告)日：2021-11-30

申请号：US16234081

申请日：2018-12-27

Applicant: Intel Corporation

Inventor： Zhenyu Zhu ,  Joel L. Finkel ,  Lean Kim Ong ,  Siow Hoay Lim ,  Mikal Hunsaker

IPC: G06F13/42 ,  G06F13/40

Abstract: Apparatuses and methods relating to an enhanced serial peripheral interface (eSPI) port expander circuitry are described. In an embodiment, an apparatus includes an upstream eSPI port, a plurality of downstream eSPI ports, and an eSPI aggregator. The upstream eSPI port is to operate as an eSPI slave on an upstream eSPI bus. Each of the plurality of downstream eSPI ports is to operate as an eSPI master on a corresponding one of a plurality of downstream eSPI buses. The eSPI aggregator is to forward or broadcast transactions from the upstream eSPI bus to one or more of the plurality of downstream eSPI buses and to aggregate responses from one or more of the downstream eSPI buses.