公开(公告)号：US10860762B2

公开(公告)日：2020-12-08

申请号：US16509482

申请日：2019-07-11

Applicant: Intel Corporation

Inventor： Robert P. Adler ,  Husnara Khan ,  Satish Venkatesan ,  Ramamurthy Sunder ,  Mukesh K. Mishra ,  Bindu Lalitha ,  Hassan M. Shehab ,  Sandhya Seshadri ,  Dhrubajyoti Kalita ,  Wendy Liu ,  Hanumanth Bollineni ,  Snehal Kharkar

IPC: G06F30/327

Abstract: Methods and apparatus relating to subsystem-based System on Chip (SoC) integration are described. In one embodiment, logic circuitry determines one or more components of a subsystem. The subsystem supports an architectural feature to be implemented on a System on Chip (SoC) device. A first interface communicatively couples a first component of the subsystem to a first component of another subsystem. A second interface communicatively couples at least one component of the subsystem to at least one chassis component of the SoC device or communicatively couples the at least one component of the subsystem to at least one non-chassis component of the other subsystem. In an embodiment, components of the subsystem may be packaged such that the packaging generates a reusable collateral that allows for fast integration of all aspects of design in any SoC device with a compatible chassis prior to manufacture.

公开(公告)号：US20190340313A1

公开(公告)日：2019-11-07

申请号：US16509482

申请日：2019-07-11

Applicant: Intel Corporation

Inventor： Robert P. Adler ,  Husnara Khan ,  Satish Venkatesan ,  Ramamurthy Sunder ,  Mukesh K. Mishra ,  Bindu Lalitha ,  Hassan M. Shehab ,  Sandhya Seshadri ,  Dhrubajyoti Kalita ,  Wendy Liu ,  Hanumanth Bollineni ,  Snehal Kharkar

IPC: G06F17/50

Abstract: Methods and apparatus relating to subsystem-based System on Chip (SoC) integration are described. In one embodiment, logic circuitry determines one or more components of a subsystem. The subsystem supports an architectural feature to be implemented on a System on Chip (SoC) device. A first interface communicatively couples a first component of the subsystem to a first component of another subsystem. A second interface communicatively couples at least one component of the subsystem to at least one chassis component of the SoC device or communicatively couples the at least one component of the subsystem to at least one non-chassis component of the other subsystem. In an embodiment, components of the subsystem may be packaged such that the packaging generates a reusable collateral that allows for fast integration of all aspects of design in any SoC device with a compatible chassis prior to manufacture.