公开(公告)号：US10950198B2

公开(公告)日：2021-03-16

申请号：US15641463

申请日：2017-07-05

Applicant: Intel Corporation

Inventor： Aruna Kumar L S ,  Anoop Karunan ,  Sanjib Basu ,  Sunil Kumar C R

IPC: G09G5/00 ,  H04L29/06 ,  G09G5/36 ,  G09G3/20 ,  H04L7/00

Abstract: Embodiments include systems, devices, and methods for a combination CPHY/DPHY/eDP display transmission PHY. A CDE can include a MIPI display serial interface (DSI) circuitry configured to receive 8 bit data compliant with a DSI protocol and output a differential pair signal to a PISO circuit. The same data path is configured for incoming eDP data, which can be routed to circuitry configured to receive 10 bit data compliant with an eDP protocol and output a differential pair signal to a PISO circuit. The system can include a CPHY circuitry that includes a mapper circuit to map a 16 bit input to a 21 bit output, mapper circuit having three 7 bit outputs, and CPHY logic to output a trio. The MUX coupled to an output of the PISO is configured to output one of the eDP or the DSI or the CPHY data to an display driver.

公开(公告)号：US09984654B2

公开(公告)日：2018-05-29

申请号：US15595853

申请日：2017-05-15

Applicant: Intel Corporation

Inventor： Aruna Kumar ,  Prakash K. Radhakrishnan ,  Pravas Pradhan ,  Sunil Kumar C R ,  Vikas J

IPC: G09G5/00

CPC classification number: G09G5/006 ,  G09G2300/08 ,  G09G2310/027 ,  G09G2330/021 ,  G09G2330/028 ,  G09G2370/08 ,  G09G2370/10 ,  G09G2370/12 ,  H04L25/0272

Abstract: A semiconductor chip is described. The semiconductor chip includes a display controller having a driver. The display controller is configurable to select a first, a second, a third and a fourth different display interface. The driver is designed to drive respective signals for each of the first, second, third and fourth interfaces through a single output.

公开(公告)号：US09503288B2

公开(公告)日：2016-11-22

申请号：US14142320

申请日：2013-12-27

Applicant: Intel Corporation

Inventor： Aruna Arun Kumar ,  Prakash K. Radhakrishnan ,  Pravas Pradhan ,  Sunil Kumar C R ,  Vikas J.

IPC: H04L25/02 ,  G09G5/00

CPC classification number: G09G5/006 ,  G09G2300/08 ,  G09G2310/027 ,  G09G2330/021 ,  G09G2330/028 ,  G09G2370/08 ,  G09G2370/10 ,  G09G2370/12 ,  H04L25/0272

Abstract: A semiconductor chip is described. The semiconductor chip includes a display controller having a driver. The display controller is configurable to select a first, a second, a third and a fourth different display interface. The driver is designed to drive respective signals for each of the first, second, third and fourth interfaces through a single output.

Abstract translation: 描述半导体芯片。 半导体芯片包括具有驱动器的显示控制器。 显示控制器可配置为选择第一，第二，第三和第四不同的显示界面。 驱动器被设计成通过单个输出驱动第一，第二，第三和第四接口中的每一个的相应信号。

公开(公告)号：US09653040B2

公开(公告)日：2017-05-16

申请号：US15359401

申请日：2016-11-22

Applicant: Intel Corporation

Inventor： Aruna Kumar ,  Prakash K. Radhakrishnan ,  Pravas Pradhan ,  Sunil Kumar C R ,  Vikas J

IPC: G09G5/00

CPC classification number: G09G5/006 ,  G09G2300/08 ,  G09G2310/027 ,  G09G2330/021 ,  G09G2330/028 ,  G09G2370/08 ,  G09G2370/10 ,  G09G2370/12 ,  H04L25/0272

Abstract: A semiconductor chip is described. The semiconductor chip includes a display controller having a driver. The display controller is configurable to select a first, a second, a third and a fourth different display interface. The driver is designed to drive respective signals for each of the first, second, third and fourth interfaces through a single output.