公开(公告)号：US09158357B2

公开(公告)日：2015-10-13

申请号：US13730625

申请日：2012-12-28

Applicant: Intel Corporation

Inventor： Jaya L. Jeyaseelan ,  Linda Weyhing ,  Rajeev Nalawadi ,  Barnes Cooper ,  Suraj Varma ,  Nevo Idan ,  David Poisner

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3206 ,  G06F1/3234 ,  G06F1/3287 ,  Y02D10/171

Abstract: In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.

Abstract translation: 在本文描述的至少一个实施例中，提供了一种装置，其可以包括用于如果软件等待时间容差寄存器模式是活动的，则用于在软件等待时间寄存器中传送连接到平台的设备的等待时间容限值的装置。 该装置还可以包括用于在主机控制器处于活动状态时从硬件等待时间寄存器传送等待时间容差值的装置。 延迟容限值可以发送到电源管理控制器。 更具体的示例可以包括用于在软件延迟容限寄存器模式不活动且主机控制器不活动的情况下从软件延迟寄存器传送延迟容限值的装置。 该装置还可以包括用于使用BIOS /平台驱动器在设备的软件延迟寄存器中映射资源空间的装置。 可以使用高级配置和电源接口设备描述来实现映射。