公开(公告)号：US20200211259A1

公开(公告)日：2020-07-02

申请号：US16235391

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： MICHAEL APODACA ,  CARSTEN BENTHIN ,  KAI XIAO ,  CARSON BROWNLEE ,  TIMOTHY ROWLEY ,  JOSHUA BARCZAK ,  TRAVIS SCHLUESSLER

IPC: G06T15/06 ,  G06F7/14 ,  G06F16/901 ,  G06F9/38

Abstract: Apparatus and method for acceleration data structure refit. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes including inner nodes and leaf nodes stored in a memory in a depth-first search (DFS) order; traversal hardware logic to traverse one or more of the rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node refit unit comprising circuitry and/or logic to read consecutively through at least the inner nodes in the memory in reverse DFS order to perform a bottom-up refit operation on the hierarchical acceleration data structure.