公开(公告)号：US20230178426A1

公开(公告)日：2023-06-08

申请号：US17541976

申请日：2021-12-03

Applicant: Intel Corporation

Inventor： Tiffany ZINK ,  Shashi VYAS ,  Weimin HAN ,  Sudipto NASKAR ,  Charles H. WALLACE

IPC: H01L21/768 ,  H01L23/522

CPC classification number: H01L21/76834 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76844 ,  H01L23/5226 ,  H01L21/76877 ,  H01L23/53228

Abstract: Embodiments of the disclosure are in the field of integrated circuit structure fabrication. In an example, an integrated circuit structure includes an inter-layer dielectric (ILD) layer over a conductive interconnect line, the ILD layer having a trench therein, the trench exposing a portion of the conductive interconnect line. A dielectric liner layer is along a top surface of the ILD layer and along sidewalls of the trench, the dielectric liner layer having an opening therein, the opening over the portion of the conductive interconnect line. A conductive via structure is in the trench and between portions of the dielectric liner layer along the sidewalls of the trench, the conductive via structure having a portion extending vertically beneath the dielectric liner layer and in contact with the portion of the conductive interconnect line.