公开(公告)号：US20240354367A1

公开(公告)日：2024-10-24

申请号：US18574968

申请日：2021-12-07

Applicant: Intel Corporation

Inventor： Peng ZHAO ,  Xiao Dong LIN ,  Zhong CAO ,  Wei ZHU

IPC: G06F17/16

CPC classification number: G06F17/16

Abstract: Systems, apparatuses and methods include technology that identifies that a computation will be executed based on a plurality of values. The technology determines an order-of-operations associated with the computation and loads the plurality of values in an order determined based on the order-of-operations.

公开(公告)号：US20210350210A1

公开(公告)日：2021-11-11

申请号：US17041336

申请日：2018-07-30

Applicant: INTEL CORPORATION

Inventor： Jiong GONG ,  Haihao SHEN ,  Xiao Dong LIN ,  Xiaoli LIU

IPC: G06N3/04 ,  G06F7/483 ,  G06F17/16 ,  G06N3/08 ,  G06N3/063

Abstract: A method and apparatus for keeping statistical inference accuracy with 8-bit winograd convolution. A calibration dataset and a pretrained CNN comprising 32-bit floating point weight values may be sampled to generate an input activation tensor and a weight tensor. A transformed input activation tensor may be generated by multiplying the input activation tensor and an input matrix to generate a transformed input activation tensor. A transformed weight tensor may be generated by multiplying the weight tensor and a weight matrix. A scale factor may be computed for each transformed tensor. An 8-bit CNN model including the scale factors may be generated.

公开(公告)号：US20160364276A1

公开(公告)日：2016-12-15

申请号：US14777065

申请日：2014-12-09

Applicant: INTEL CORPORATION

Inventor： Yong WU ,  Xiao Dong LIN ,  Yihua JIN ,  Xueliang ZHONG ,  Jianhui LI

IPC: G06F9/54 ,  G06F9/30 ,  G06F9/45

CPC classification number: G06F9/541 ,  G06F8/41 ,  G06F9/30145 ,  G06F9/4552 ,  G06F9/45533

Abstract: Methods, apparatuses and storage medium associated with execution of application code having multiple ISAs, are disclosed. In various embodiments, a runtime environment may execute application code having multiple instruction set architectures. The runtime environment may be configured to execute first code of the application code according to a first instruction set architecture, while also configured to execute second code of the application code according to a second instruction set architecture that extends the first instruction set architecture. Using gates, the runtime environment may be adapted to adapt an interaction from the first code to the second instruction set architecture and/or adapt an interaction from the second code to the first instruction set architecture and, subsequently, return to executing the application code according to the first instruction set architecture or the second instruction set architecture, respectively. Other embodiments may be disclosed or claimed.

Abstract translation: 公开了与执行具有多个ISA的应用代码相关联的方法，装置和存储介质。 在各种实施例中，运行时环境可以执行具有多个指令集体系结构的应用代码。 运行时环境可以被配置为根据第一指令集架构来执行应用代码的第一代码，同时还被配置为根据扩展第一指令集架构的第二指令集架构来执行应用代码的第二代码。 使用门，运行时环境可以被适配成适应从第一代码到第二指令集体系结构的交互和/或使从第二代码到第一指令集体系结构的交互适应，并随后返回到执行应用程序代码 分别到第一指令集架构或第二指令集架构。 可以公开或要求保护其他实施例。