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公开(公告)号:US09947619B2
公开(公告)日:2018-04-17
申请号:US15203718
申请日:2016-07-06
申请人: Intel Corporation
发明人: Ke Wang , Xingjian Cai , Mohammad Ibrahim Khan , Yun Ji
IPC分类号: H01L23/522 , H01L23/528 , H01L49/02
CPC分类号: H01L23/528 , H01L23/642 , H01L23/66 , H01L28/40 , H01L2223/6638 , H01L2223/6655 , H01L2924/15192
摘要: Techniques and mechanism to provide signal communication with vias variously extending in a substrate. In an embodiment, a first capacitor and a second capacitor are coupled in parallel with one another each between a first via and a second via, the first via to receive a first signal. Respective portions of the first signal are concurrently communicated from the first via to the second via with the first capacitor and the second capacitor, respectively. In another embodiment, the first signal is one signal of a differential signal pair further comprising a second signal which is received at a third via. Respective portions of the second signal are concurrently communicated from the third via to a fourth via with a third capacitor and a fourth capacitor, respectively. The third capacitor and the fourth capacitor are coupled in parallel with one another each between the third via and the fourth via.
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公开(公告)号:US10971444B2
公开(公告)日:2021-04-06
申请号:US16465101
申请日:2017-11-29
申请人: Intel Corporation
发明人: Jimmy Huat Since Huang , Xingjian Cai , Paik Wen Ong , Herh Nan Chen , Yun Ji
IPC分类号: H01L23/522 , H01L23/498 , H01L23/50 , H01L23/528 , H01L23/66 , H01L27/06 , H03H7/01 , H05K1/02
摘要: An electronic apparatus and an electronic system may include a first power delivery network (PDN) and a second PDN. The first PDN may include a first inductor as a segment of a power rail of the first PDN, while the second PDN may include a second inductor as a segment of a power rail of the second PDN. The first inductor and the second inductor may form a magnetically coupled inductor. The magnetically coupled inductor may provide migrated impedance ZT to the first PDN induced by the magnetically coupled inductor. The migrated impedance ZT to the first PDN may help the first PDN to reduce its voltage noise. Other embodiments may be described and/or claimed.
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3.
公开(公告)号:US20240077924A1
公开(公告)日:2024-03-07
申请号:US17939772
申请日:2022-09-07
申请人: Intel Corporation
发明人: Praveen Mosalikanti , Robert Mongrain , Xingjian Cai , Yihong Yang , Long Wang
IPC分类号: G06F1/28 , G01R19/165 , G06F1/3228
CPC分类号: G06F1/28 , G01R19/16552 , G06F1/3228 , H02J7/0047
摘要: Embodiments of a power regulation circuit that ameliorates a first and second droop in a power source voltage that powers a processing core are disclosed. The power regulation circuit includes a first droop detector, a second droop detector and a frequency slowdown detection circuit. The first droop detector generates a first droop detection signal in a first detection state in response to detecting a first droop in the power source voltage. The second droop detector generates a second droop detection signal in a second detection state in response to detecting a second droop in the power source voltage. The frequency slowdown detection circuit to generate a frequency slowdown signal in a slowdown state in response to at least one of the first droop detection signal being in the first detection state and the second droop detection signal being in the second detection state.
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