公开(公告)号：US20210064384A1

公开(公告)日：2021-03-04

申请号：US17054713

申请日：2018-12-18

Applicant: Intel Corporation

Inventor： Shuo LIU ,  Yipeng YAO ,  Hu CHEN ,  Yifan ZHANG ,  Jia BAO

IPC: G06F9/4401

Abstract: Apparatuses, methods and storage medium associated with multi-phase/level boot technology, are disclosed herein. In embodiments, a method may include resuming an initial execution image of a computing platform from persistent storage to execute an initial task; and subsequently, resuming a full execution image of the computing platform from the persistent storage to execute one of a plurality of operational tasks. Other embodiments are also described and claimed.

公开(公告)号：US20240185905A1

公开(公告)日：2024-06-06

申请号：US18547910

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Shuo LIU ,  Yao Zu DONG ,  Qing HUANG ,  Kevin Yufu LI ,  Yipeng YAO ,  Jie YU

IPC: G11C11/406 ,  G11C11/408 ,  G11C11/4096

CPC classification number: G11C11/40611 ,  G11C11/408 ,  G11C11/4096

Abstract: A memory device comprises an input interface configured to receive an erase request indicating a memory portion to be erased and control circuitry configured to trigger erasing information stored by memory cells of at least a part of the indicated memory portion of the memory device by writing a predefined pattern into the memory cells during an automatic refresh cycle.