公开(公告)号：US20160277174A1

公开(公告)日：2016-09-22

申请号：US15042252

申请日：2016-02-12

Applicant: Intel IP Corporation

Inventor： Admir Burnic ,  Frank Huertgen

IPC: H04L7/00 ,  H04W88/06 ,  H04B1/3816

CPC classification number: H04L7/0008 ,  H04B1/3816 ,  H04W56/001 ,  H04W56/0035 ,  H04W88/06

Abstract: A synchronization device includes a receiver circuit configured to receive data from a first radio network during a first time interval and to receive data from a second radio network during a second time interval; a frequency synchronization circuit configured to control a common system clock based on first data received from the first radio network and based on second data received from the second radio network; and a timing synchronization circuit configured to time-synchronize data reception based on the common system clock and based on a free running clock.

Abstract translation: 同步装置包括被配置为在第一时间间隔期间从第一无线电网络接收数据并且在第二时间间隔期间从第二无线电网络接收数据的接收机电路; 频率同步电路，被配置为基于从第一无线电网络接收的第一数据并且基于从第二无线电网络接收的第二数据来控制公共系统时钟; 以及定时同步电路，被配置为基于公共系统时钟并基于自由运行时钟来对数据接收进行时间同步。

公开(公告)号：US10122522B2

公开(公告)日：2018-11-06

申请号：US15042252

申请日：2016-02-12

Applicant: Intel IP Corporation

Inventor： Admir Burnic ,  Frank Huertgen

IPC: H04W88/06 ,  H04L7/00 ,  H04B1/3816 ,  H04W56/00

Abstract: A synchronization device includes a receiver circuit configured to receive data from a first radio network during a first time interval and to receive data from a second radio network during a second time interval; a frequency synchronization circuit configured to control a common system clock based on first data received from the first radio network and based on second data received from the second radio network; and a timing synchronization circuit configured to time-synchronize data reception based on the common system clock and based on a free running clock.