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公开(公告)号：US10454748B2
公开(公告)日：2019-10-22
申请号：US15754043
申请日：2015-09-25
Applicant: Intel IP Corporation
Inventor： Burkhard Neurauter , Christian Mayer , Jan Zaleski , Jovan Markovic
Abstract: An apparatus for generating a radio frequency signal based on a symbol within a constellation diagram is provided. The constellation diagram is spanned by a first axis representing an in-phase component and an orthogonal second axis representing a quadrature component. The apparatus includes a processing unit configured to select one of a plurality of segments of the constellation diagram containing the symbol. The segment is delimited by two radially extending boundaries, wherein the two radially extending boundaries span an opening angle of the segment that is different from 90°. The processing unit is further configured to calculate a first coordinate of the symbol with respect to a third axis, and a second coordinate of the symbol with respect to a fourth axis. At least one of the third axis and the fourth axis coincides with one of the two radially extending boundaries. The apparatus further includes a plurality of digital-to-analog converter cells configured to generate the radio frequency signal using the first coordinate and the second coordinate.
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公开(公告)号：US20180102794A1
公开(公告)日：2018-04-12
申请号：US15290300
申请日：2016-10-11
Applicant: INTEL IP CORPORATION
Inventor： Christian Mayer , Jovan Markovic
CPC classification number: H04B1/0028 , H04B1/0475 , H04B1/40 , H04B1/525 , H04L25/08
Abstract: A communication system receives an input signal along a signal processing path and generates a converted output signal via a digital-to-analog converter (DAC). The signal processing path branches into two different branches, a magnitude branch and a sign branch for different components of the baseband signal. A local oscillator (LO) provides a carrier signal to the signal processing path at the DAC and further generates an LO leakage signal comprising a signed LO leakage and an unsigned LO leakage during the up-conversion of signals of the sign branch with a carrier. An unsigned LO suppression component is configured to reduce or eliminate the unsigned LO leakage and a signed LO suppression component is configured to reduce or eliminate the signed LO leakage form a baseband signal of the signal processing path.
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公开(公告)号：US20180248740A1
公开(公告)日：2018-08-30
申请号：US15754043
申请日：2015-09-25
Applicant: Intel IP Corporation
Inventor： Burkhard Neurauter , Christian Mayer , Jan Zaleski , Jovan Markovic
CPC classification number: H04L27/362 , H04L27/3444
Abstract: An apparatus for generating a radio frequency signal based on a symbol within a constellation diagram is provided. The constellation diagram is spanned by a first axis representing an in-phase component and an orthogonal second axis representing a quadrature component. The apparatus includes a processing unit configured to select one of a plurality of segments of the constellation diagram containing the symbol. The segment is delimited by two radially extending boundaries, wherein the two radially extending boundaries span an opening angle of the segment that is different from 90°. The processing unit is further configured to calculate a first coordinate of the symbol with respect to a third axis, and a second coordinate of the symbol with respect to a fourth axis. At least one of the third axis and the fourth axis coincides with one of the two radially extending boundaries. The apparatus further includes a plurality of digital-to-analog converter cells configured to generate the radio frequency signal using the first coordinate and the second coordinate.
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Patent Agency Ranking
公开(公告)号：US09985811B2
公开(公告)日：2018-05-29
申请号：US15274721
申请日：2016-09-23
Applicant: Intel IP Corporation
Inventor： Christian Mayer , Franz Kuttner
CPC classification number: H04L27/08 , H04B1/0042 , H04B1/04 , H04L27/2614
Abstract: Disclosed herein is an apparatus and methodology for reducing peak-to-average-power ratio (PAPR) for IQ radio frequency digital-to-analog converter (RFDAC). Processing circuitry may be configured to generate a digital signal comprising an in-phase (I) signal component and a quadrature (Q) signal component having a peak-to-average-power-ratio (PAPR). The processing circuitry may determine the I signal component and the Q signal component are higher than a predetermined threshold value, and limit the I signal component and the Q signal component to be less than or equal to the predetermined threshold value. The processing circuitry may rotate the signal components to generate rotated signal components to reduce the PAPR based on the I and Q signal components having less than or equal to the predetermined threshold value, and may generate an output radio frequency (RF) signal based on the rotated signal components.
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公开(公告)号：US20160182101A1
公开(公告)日：2016-06-23
申请号：US14858133
申请日：2015-09-18
Applicant: Intel IP Corporation
Inventor： Jovan Markovic , Jan Zaleski , Christian Mayer
CPC classification number: H04B1/0475 , H04L27/364
Abstract: An apparatus for generating a transmit signal includes an up-conversion module and a delay module. The up-conversion module up-converts a first component signal of a multi-phase baseband transmit signal using a first oscillator signal and up-converts a delayed second component signal of the multi-phase baseband transmit signal using a second oscillator signal to generate a radio frequency transmit signal. The first oscillator signal and the second oscillator signal comprise an oscillator signal phase offset so that an edge of the second oscillator signal occurs earlier than a corresponding edge of the first oscillator signal. The delay module delays a second component signal of the multi-phase baseband transmit signal relative to the first component signal of the multi-phase baseband transmit signal by a predefined component signal delay to generate the delayed second component signal of the multi-phase baseband transmit signal.
Abstract translation: 用于产生发送信号的装置包括上变频模块和延迟模块。 上变频模块使用第一振荡器信号对多相基带发射信号的第一分量信号进行上变频，并使用第二振荡器信号对多相基带发射信号的延迟的第二分量信号进行上变频，以产生 射频发射信号。 第一振荡器信号和第二振荡器信号包括振荡器信号相位偏移，使得第二振荡器信号的边沿比第一振荡器信号的相应边缘早出现。 延迟模块相对于多相基带发射信号的第一分量信号延迟多相基带发送信号的第二分量信号预定的分量信号延迟，以产生多相基带发射的延迟的第二分量信号 信号。
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公开(公告)号：US10938424B2
公开(公告)日：2021-03-02
申请号：US15290300
申请日：2016-10-11
Applicant: INTEL IP CORPORATION
Inventor： Christian Mayer , Jovan Markovic
Abstract: A communication system receives an input signal along a signal processing path and generates a converted output signal via a digital-to-analog converter (DAC). The signal processing path branches into two different branches, a magnitude branch and a sign branch for different components of the baseband signal. A local oscillator (LO) provides a carrier signal to the signal processing path at the DAC and further generates an LO leakage signal comprising a signed LO leakage and an unsigned LO leakage during the up-conversion of signals of the sign branch with a carrier. An unsigned LO suppression component is configured to reduce or eliminate the unsigned LO leakage and a signed LO suppression component is configured to reduce or eliminate the signed LO leakage form a baseband signal of the signal processing path.
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公开(公告)号：US20200059386A1
公开(公告)日：2020-02-20
申请号：US16492801
申请日：2017-04-01
Applicant: Intel IP Corporation
Inventor： Christian Mayer , Thomas Mayer
IPC: H04L27/00 , H04L27/227 , H03D3/00 , H04L27/26
Abstract: An apparatus and a method for synchronizing a Digital Frequency Shift (DFS) for a signal to be transmitted over a wireless channel are disclosed. For example, the method, by a synchronizer, transmits a DFS trigger to a Digital Front End (DFE) processor and a Local Oscillator (LO) trigger to an LO in a synchronous manner, the method, by the DFE processor, applies a DFS on received data in response to receiving the DFS trigger, the method, by the LO, applies a complementary shift on a carrier signal in response to receiving the LO trigger, the method, by the upconverter, digital-to-analog converts and radio frequency modulates the digital frequency-shifted received data and the complementary-shifted carrier signal. In another example, the method, by the synchronizer, transmits a phase error to a phase error corrector that performs a phase error correction.
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公开(公告)号：US09722645B2
公开(公告)日：2017-08-01
申请号：US14858133
申请日：2015-09-18
Applicant: Intel IP Corporation
Inventor： Jovan Markovic , Jan Zaleski , Christian Mayer
CPC classification number: H04B1/0475 , H04L27/364
Abstract: An apparatus for generating a transmit signal includes an up-conversion module and a delay module. The up-conversion module up-converts a first component signal of a multi-phase baseband transmit signal using a first oscillator signal and up-converts a delayed second component signal of the multi-phase baseband transmit signal using a second oscillator signal to generate a radio frequency transmit signal. The first oscillator signal and the second oscillator signal comprise an oscillator signal phase offset so that an edge of the second oscillator signal occurs earlier than a corresponding edge of the first oscillator signal. The delay module delays a second component signal of the multi-phase baseband transmit signal relative to the first component signal of the multi-phase baseband transmit signal by a predefined component signal delay to generate the delayed second component signal of the multi-phase baseband transmit signal.
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