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公开(公告)号:US20240029942A1
公开(公告)日:2024-01-25
申请号:US18200062
申请日:2023-05-22
Applicant: Intel corporation
Inventor: Chuanzhao Yu , Qiang Li , David Newman
CPC classification number: H01F27/2804 , H01F41/041 , H01F2027/2809
Abstract: A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire sections in parallel spaced relation extending around the center axis and the first wire section is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire section of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.
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公开(公告)号:US20220166430A1
公开(公告)日:2022-05-26
申请号:US17669762
申请日:2022-02-11
Applicant: Intel Corporation
Inventor: Chuanzhao Yu , Stephan Leuschner , David Newman
IPC: H03K17/693 , H03H7/42 , H03K17/06 , H03K17/16
Abstract: Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.
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公开(公告)号:US12087491B2
公开(公告)日:2024-09-10
申请号:US18200062
申请日:2023-05-22
Applicant: Intel Corporation
Inventor: Chuanzhao Yu , Qiang Li , David Newman
CPC classification number: H01F27/2804 , H01F41/041 , H01F2027/2809
Abstract: An inductance apparatus includes a first winding comprising a first wire section and a second wire section. The first wire section and the second wire section are disposed in a first horizontal plane associated with a center axis, and the first winding is associated with an equivalent current flow path within the first horizontal plane; a second winding extends via the center axis in the first horizontal plane to the first wire section and the second wire section, wherein the equivalent current flow path of the first winding is aligned with a current flow path associated with the second winding.
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公开(公告)号:US11632108B2
公开(公告)日:2023-04-18
申请号:US17669762
申请日:2022-02-11
Applicant: Intel Corporation
Inventor: Chuanzhao Yu , Stephan Leuschner , David Newman
IPC: H03K17/693 , H03H7/42 , H03K17/06 , H03K17/16
Abstract: Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.
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公开(公告)号:US11283444B2
公开(公告)日:2022-03-22
申请号:US16766843
申请日:2018-03-28
Applicant: Intel Corporation
Inventor: Chuanzhao Yu , Stephan Leuschner , David Newman
IPC: H03K17/693 , H03H7/42 , H03K17/06 , H03K17/16
Abstract: Techniques are provided for fanning out a signal from a balun. In various aspects, the system can include a balun configured to receive a signal for transmission at an input and to provide a representation of the signal at an output, a plurality of pass gate circuits, each pass gate circuit configured to receive the representation of the signal at a first node, to receive a control signal at a second node to pass the representation of the signal to a third node when the control signal is in a first state, and to isolate the representation of the signal from the third node when the control signal is in a second state. The first state of the control signal can include a non-zero voltage, and the second state of the control signal can include the non-zero voltage with a polarity opposite the non-zero voltage of the first state.
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公开(公告)号:US11694836B2
公开(公告)日:2023-07-04
申请号:US16958049
申请日:2018-03-30
Applicant: Intel Corporation
Inventor: Chuanzhao Yu , Qiang Li , David Newman
CPC classification number: H01F27/2804 , H01F41/041 , H01F2027/2809
Abstract: A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire components in parallel spaced relation extending around the center axis and the first wire component is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire component of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.
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