Resistance drift mitigation in non-volatile memory cell

    公开(公告)号:US11430954B2

    公开(公告)日:2022-08-30

    申请号:US17106286

    申请日:2020-11-30

    IPC分类号: H01L45/00

    摘要: A mushroom-type Phase-Change Memory (PCM) device includes a substrate, a lower interconnect disposed in the substrate, a first dielectric layer disposed on the substrate, a bottom electrode disposed in the first dielectric layer and extending above an upper surface of the first dielectric layer, a type drift-mitigation liner encircling an upper portion of the bottom electrode extending above the upper surface of the first dielectric layer, a PCM element disposed on the liner and an upper surface of the bottom electrode, a top electrode disposed on the PCM element, and a second dielectric layer disposed on an exposed portion of the first dielectric layer and the top electrode, wherein the second dielectric layer is disposed on sidewalls of the liner, the PCM element, and the top electrode.

    RESISTANCE DRIFT MITIGATION IN NON-VOLATILE MEMORY CELL

    公开(公告)号:US20220173312A1

    公开(公告)日:2022-06-02

    申请号:US17106286

    申请日:2020-11-30

    IPC分类号: H01L45/00

    摘要: A mushroom-type Phase-Change Memory (PCM) device includes a substrate, a lower interconnect disposed in the substrate, a first dielectric layer disposed on the substrate, a bottom electrode disposed in the first dielectric layer and extending above an upper surface of the first dielectric layer, a type drift-mitigation liner encircling an upper portion of the bottom electrode extending above the upper surface of the first dielectric layer, a PCM element disposed on the liner and an upper surface of the bottom electrode, a top electrode disposed on the PCM element, and a second dielectric layer disposed on an exposed portion of the first dielectric layer and the top electrode, wherein the second dielectric layer is disposed on sidewalls of the liner, the PCM element, and the top electrode.