公开(公告)号：US20030035260A1

公开(公告)日：2003-02-20

申请号：US10213766

申请日：2002-08-07

Applicant: Intersil Americas Inc.

Inventor： William B. Shearon ,  Paul K. Sferrazza

IPC: H02H003/08

CPC classification number: H02M3/158 ,  H02M1/36 ,  H02M3/1588 ,  H02M2001/007 ,  H02M2001/009 ,  Y02B70/1466 ,  Y10S323/901

Abstract: A cascaded DC-DC converter architecture has an upstream converter stage and a downstream converter stage, which derives its input voltage from the upstream stage. Cascading the two converter stages enables functionality of control and monitoring (including soft start and overcurrent detection) circuitry of the upstream stage to be used for the downstream stage, to reduce chip area, cost, and complexity. A voltage window regulator in the downstream converter ensures that, during shutdown, its output voltage will be maintained within a prescribed window of its regulated output voltage, so that no soft start delay is needed when the second converter stage is turned back on.

Abstract translation: 级联DC-DC转换器架构具有上游转换器级和下游转换级，其从上游级导出其输入电压。 分级两个转换器级使上游级的控制和监控（包括软启动和过流检测）电路的功能用于下游级，以减少芯片面积，成本和复杂性。 下游转换器中的电压窗调节器确保在关断期间，其输出电压将保持在其调节输出电压的规定窗口内，以便在第二个转换器级被重新接通时不需要软启动延迟。