公开(公告)号：US20030107358A1

公开(公告)日：2003-06-12

申请号：US10304203

申请日：2002-11-26

Applicant: Intersil Americas Inc.

Inventor： Robert Haynes Isham ,  Paul K. Sferrazza

IPC: G05F001/40

CPC classification number: H02M3/156 ,  G01R19/32 ,  G05F3/262 ,  H02M2001/0009

Abstract: A programmably switched, multi-output stage current mirror-based, current-sensing and correction circuit controls the operation of a buck mode DC-DC converter. This correction circuit generates a correction current having a prescribed step-wise temperature-compensating relationship to sensed current. The sensed current is derived from a variable impedance controlled by a sense amplifier coupled via a current feedback resistor to the common output node between a high side power switching device and a low side power switching device of the converter. To program the correction circuit a decoder maps temperature information associated with the low side power switching device and additional programming information into a current mirror control code.

Abstract translation: 可编程切换的多输出级电流反射镜，电流检测和校正电路控制降压模式DC-DC转换器的操作。 该校正电路产生对感测电流具有规定的逐步温度补偿关系的校正电流。 所感测的电流源自由经由电流反馈电阻器连接到转换器的高侧功率开关器件和低侧功率开关器件之间的公共输出节点的读出放大器控制的可变阻抗。 为了对校正电路进行编程，解码器将与低侧功率开关器件相关联的温度信息和附加编程信息映射到当前镜像控制代码中。

公开(公告)号：US20030035260A1

公开(公告)日：2003-02-20

申请号：US10213766

申请日：2002-08-07

Applicant: Intersil Americas Inc.

Inventor： William B. Shearon ,  Paul K. Sferrazza

IPC: H02H003/08

CPC classification number: H02M3/158 ,  H02M1/36 ,  H02M3/1588 ,  H02M2001/007 ,  H02M2001/009 ,  Y02B70/1466 ,  Y10S323/901

Abstract: A cascaded DC-DC converter architecture has an upstream converter stage and a downstream converter stage, which derives its input voltage from the upstream stage. Cascading the two converter stages enables functionality of control and monitoring (including soft start and overcurrent detection) circuitry of the upstream stage to be used for the downstream stage, to reduce chip area, cost, and complexity. A voltage window regulator in the downstream converter ensures that, during shutdown, its output voltage will be maintained within a prescribed window of its regulated output voltage, so that no soft start delay is needed when the second converter stage is turned back on.

Abstract translation: 级联DC-DC转换器架构具有上游转换器级和下游转换级，其从上游级导出其输入电压。 分级两个转换器级使上游级的控制和监控（包括软启动和过流检测）电路的功能用于下游级，以减少芯片面积，成本和复杂性。 下游转换器中的电压窗调节器确保在关断期间，其输出电压将保持在其调节输出电压的规定窗口内，以便在第二个转换器级被重新接通时不需要软启动延迟。

公开(公告)号：US20040130307A1

公开(公告)日：2004-07-08

申请号：US10725764

申请日：2003-12-02

Applicant: Intersil Americas Inc. State of Incorporation: Delaware

Inventor： Noel Dequina ,  Donald R. Preslar ,  Paul K. Sferrazza

IPC: G05F001/40

CPC classification number: H02M1/38 ,  H02M3/1588 ,  Y02B70/1466

Abstract: A control circuit for a switch mode DC-DC converter contains an arrangement of monitored LGATE, UGATE and PHASE node condition threshold detectors, outputs of which are processed in accordance with a switching control operator to ensure that each of an upper FET (UFET) and a lower FET (LFET) is completely turned off before the other FET begins conduction, thereby maintaining a dead time that exhibits no shoot-through current and is independent of the type of switching FET.

Abstract translation: 用于开关模式DC-DC转换器的控制电路包含监视的LGATE，UGATE和PHASE节点状态阈值检测器的布置，其输出根据切换控制算子进行处理，以确保上FET（UFET）和 在另一个FET开始导通之前，下部FET（LFET）完全关闭，从而保持不存在直通电流的死区时间，并且不依赖于开关FET的类型。

公开(公告)号：US20040124818A1

公开(公告)日：2004-07-01

申请号：US10685314

申请日：2003-10-14

Applicant: Intersil Americas Inc., ,  State of Corporation : Delaware

Inventor： Noel B. Dequina ,  Donald R. Preslar ,  Paul K. Sferrazza

IPC: G05F001/40

CPC classification number: H02M1/36 ,  H02M1/32 ,  H02M3/156 ,  H02M3/1588 ,  Y02B70/1466

Abstract: An over-voltage protection circuit prevents an anomaly, such as a short circuit in the upper-switched electronic device of a DC-DC power supply, from propagating to downstream circuitry. The over-voltage protection circuit, which includes an overvoltage sense resistor coupled between an output of the upper or high side FET and the gate of the lower FET, is operative to sense a short circuit fault condition in the circuit path through the upper FET during initial power up of the system. In response to this condition, the lower NFET device is turned on so as to provide an immediate by-pass of the overvoltage condition to ground, and thereby prevent excessive voltage from being applied by the output terminal to downstream powered circuitry.

Abstract translation: 过电压保护电路防止DC-DC电源的上部开关电子装置中的短路等异常传播到下游电路。 包括耦合在上侧FET或高侧FET的输出端与下部FET的栅极之间的过电压检测电阻器的过电压保护电路可操作以感测通过上部FET的电路中的短路故障状况 初始启动系统。 响应于这种情况，下部NFET器件导通，以便将过电压状态的瞬时旁路提供给地，从而防止输出端子向下游供电电路施加过大的电压。