公开(公告)号：US20250021859A1

公开(公告)日：2025-01-16

申请号：US18770347

申请日：2024-07-11

Applicant: IonQ, Inc.

Inventor： Felix TRIPIER ,  Redeat ALEMU ,  Joel Zvi APISDORF ,  Vandiver CHAPLIN ,  Steven FRIEDMAN ,  Carl HENNING ,  Mike WILLIAMS

IPC: G06N10/70 ,  G06N10/20

Abstract: Systems and methods are described for use in the implementation and/or operation of quantum information processing (QIP) systems, and more particularly, to implementation of streaming gates.

公开(公告)号：US20240134216A1

公开(公告)日：2024-04-25

申请号：US18542331

申请日：2023-12-15

Applicant: IonQ, Inc.

Inventor： Joel Zvi APISDORF ,  jAMES mICHAEL WILLIAMS ,  Phillip Douglas SOLOMON ,  Jason Madjdi AMINI

IPC: G02F1/017 ,  G02F7/00 ,  G06F1/10 ,  G06N10/00

CPC classification number: G02F1/017 ,  G02F7/00 ,  G06F1/10 ,  G06N10/00 ,  G02F1/01791

Abstract: The disclosure describes various aspects of a system with scalable and programmable coherent waveform generators. A network and digital-to-analog conversion (DAC) cards used by the network are described where each DAC card has a clock divider/replicator device with an input SYNC pin, a digital logic component, and one or more DAC components, and each output of the DAC components is used to control optical beams for a separate qubit of a quantum information processing (QIP) system. The network also includes a first distribution network to provide a clock signal to the clock divider/replicator device in the DAC cards, and a second distribution network to provide a start signal to the DAC cards, where the start signal is used by the digital logic component in the DAC card to assert the input SYNC pin when the start signal is asserted unless it is masked by the digital logic component.

公开(公告)号：US20220260860A1

公开(公告)日：2022-08-18

申请号：US17738775

申请日：2022-05-06

Applicant: IonQ, Inc.

Inventor： Joel Zvi APISDORF ,  James Michael WILLIAMS ,  Phillip Douglas SOLOMON ,  Jason Madjdi AMINI

IPC: G02F1/017 ,  G06N10/00 ,  G02F7/00 ,  G06F1/10

Abstract: The disclosure describes various aspects of a system with scalable and programmable coherent waveform generators. A network and digital-to-analog conversion (DAC) cards used by the network are described where each DAC card has a clock divider/replicator device with an input SYNC pin, a digital logic component, and one or more DAC components, and each output of the DAC components is used to control optical beams for a separate qubit of a quantum information processing (QIP) system. The network also includes a first distribution network to provide a clock signal to the clock divider/replicator device in the DAC cards, and a second distribution network to provide a start signal to the DAC cards, where the start signal is used by the digital logic component in the DAC card to assert the input SYNC pin when the start signal is asserted unless it is masked by the digital logic component.

公开(公告)号：US20210026162A1

公开(公告)日：2021-01-28

申请号：US16936755

申请日：2020-07-23

Applicant: IonQ, Inc.

Inventor： Joel Zvi APISDORF ,  James Michael WILLIAMS ,  Phillip Douglas SOLOMON ,  Jason Madjdi AMINI

IPC: G02F1/017 ,  G06N10/00 ,  G06F1/10 ,  G02F7/00

Abstract: The disclosure describes various aspects of a system with scalable and programmable coherent waveform generators. A network and digital-to-analog conversion (DAC) cards used by the network are described where each DAC card has a clock divider/replicator device with an input SYNC pin, a digital logic component, and one or more DAC components, and each output of the DAC components is used to control optical beams for a separate qubit of a quantum information processing (QIP) system. The network also includes a first distribution network to provide a clock signal to the clock divider/replicator device in the DAC cards, and a second distribution network to provide a start signal to the DAC cards, where the start signal is used by the digital logic component in the DAC card to assert the input SYNC pin when the start signal is asserted unless it is masked by the digital logic component.