公开(公告)号：US20080315289A1

公开(公告)日：2008-12-25

申请号：US12199307

申请日：2008-08-27

申请人： JAE HWANG KIM ,  SEUNG-BEOM YOON ,  KWANG-WOOK KOH ,  CHANG-HUN LEE ,  SUNG-HO KIM ,  SUNG-CHUL PARK ,  JU-RI KIM

发明人： JAE HWANG KIM ,  SEUNG-BEOM YOON ,  KWANG-WOOK KOH ,  CHANG-HUN LEE ,  SUNG-HO KIM ,  SUNG-CHUL PARK ,  JU-RI KIM

IPC分类号： H01L29/00

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： An EEPROM device includes a device isolation layer disposed at a predetermined region of a semiconductor substrate to define active regions, a pair of control gates crossing the device isolation layers and an active region, a pair of selection gates interposed between the control gates to cross the device isolation layers and the active region and a floating gate and an intergate dielectric pattern stacked sequentially between the control gates and the active region The EEPROM device further includes a gate insulation layer of a memory transistor interposed between the floating gate and the active region and a tunnel insulation layer thinner than the gate insulation layer of the memory transistor and a gate insulation layer of a selection transistor interposed between the selection gates and the active region. The tunnel insulation layer is aligned at one side adjacent to the floating gate.

摘要翻译： EEPROM器件包括设置在半导体衬底的预定区域以限定有源区的器件隔离层，与器件隔离层交叉的一对控制栅极和有源区，插入控制栅极之间的一对选择栅极， 器件隔离层和有源区以及顺序地堆叠在控制栅极和有源区之间的浮置栅极和隔间栅极电介质图案。EEPROM器件还包括插入浮置栅极和有源区域之间的存储晶体管的栅极绝缘层，以及 隧道绝缘层比存储晶体管的栅极绝缘层薄，并且选择晶体管的栅极绝缘层插入在选择栅极和有源区之间。 隧道绝缘层在与浮动栅极相邻的一侧对准。