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公开(公告)号:US20120049278A1
公开(公告)日:2012-03-01
申请号:US13290535
申请日:2011-11-07
申请人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young CHAE , In-Taek OH
发明人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young CHAE , In-Taek OH
IPC分类号: H01L29/78
CPC分类号: H01L29/0847 , H01L29/0653 , H01L29/0878 , H01L29/42368 , H01L29/7816 , H01L29/7835
摘要: The semiconductor device includes: a first conductive-type first well and a second conductive-type second well configured over substrate to contact each other; a second conductive-type anti-diffusion region configured in an interface where the first conductive-type first well contacts the second conductive-type second well over the substrate; and a gate electrode configured to simultaneously cross the first conductive-type first well, the second conductive-type anti-diffusion region, and the second conductive-type second well over the substrate.
摘要翻译: 半导体器件包括:第一导电型第一阱和第二导电类型的第二阱,被配置在衬底上以彼此接触; 第二导电型防扩散区,其配置在所述第一导电型第一阱与所述第二导电型第二阱相接触的界面处; 以及栅电极,其被配置为在所述衬底上同时与所述第一导电型第一阱,所述第二导电型反扩散区和所述第二导电型第二阱交叉。
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公开(公告)号:US20140021542A1
公开(公告)日:2014-01-23
申请号:US13957103
申请日:2013-08-01
申请人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , In-Taek OH
发明人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , In-Taek OH
IPC分类号: H01L29/78
CPC分类号: H01L29/7816 , H01L29/0878 , H01L29/42368 , H01L29/66681
摘要: A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.
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公开(公告)号:US20140151793A1
公开(公告)日:2014-06-05
申请号:US13690973
申请日:2012-11-30
申请人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young CHAE , In-Taek OH
发明人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young CHAE , In-Taek OH
IPC分类号: H01L27/088 , H01L29/78
CPC分类号: H01L27/088 , H01L29/0653 , H01L29/0878 , H01L29/42356 , H01L29/42368 , H01L29/4238 , H01L29/7816
摘要: A semiconductor device includes a substrate with one or more active regions and an isolation layer formed to surround an active region and to extend deeper into the substrate than the one or more active regions. The semiconductor further includes a gate electrode, which covers a portion of the active region, and which has one end portion thereof extending over the isolation layer.
摘要翻译: 半导体器件包括具有一个或多个有源区的衬底和形成为围绕有源区并且比一个或多个有源区更深地延伸到衬底中的隔离层。 所述半导体还包括覆盖所述有源区的一部分的栅电极,并且其一端部延伸越过所述隔离层。
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公开(公告)号:US20140021541A1
公开(公告)日:2014-01-23
申请号:US13957071
申请日:2013-08-01
申请人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , IN-Taek OH
发明人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , IN-Taek OH
IPC分类号: H01L29/78
CPC分类号: H01L29/7816 , H01L29/0878 , H01L29/42368 , H01L29/66681
摘要: A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.
摘要翻译: 半导体器件包括在衬底上方构造的第二导电类型深阱。 深阱包括离子注入区域和扩散区域。 在扩散区域中形成第一导电型第一阱。 栅电极延伸在离子注入区域和扩散区域的部分上,并且部分地与第一阱重叠。 离子注入区域具有均匀的杂质浓度,而扩散区域的杂质浓度从在离子注入区域和扩散区域之间的边界界面处的最高浓度变为在扩散区域的部分处的最低浓度 距离边界界面最远。
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公开(公告)号:US20110115020A1
公开(公告)日:2011-05-19
申请号:US12835523
申请日:2010-07-13
申请人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , In-Taek OH
发明人: Jae-Han CHA , Kyung-Ho LEE , Sun-Goo KIM , Hyung-Suk CHOI , Ju-Ho KIM , Jin-Young Chae , In-Taek OH
IPC分类号: H01L29/78
CPC分类号: H01L29/7816 , H01L29/0878 , H01L29/42368 , H01L29/66681
摘要: A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.
摘要翻译: 半导体器件包括在衬底上方构造的第二导电类型深阱。 深阱包括离子注入区域和扩散区域。 在扩散区域中形成第一导电型第一阱。 栅电极延伸在离子注入区域和扩散区域的部分上,并且部分地与第一阱重叠。 离子注入区域具有均匀的杂质浓度,而扩散区域的杂质浓度从在离子注入区域和扩散区域之间的边界界面处的最高浓度变为在扩散区域的部分处的最低浓度 距离边界界面最远。
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