公开(公告)号：US20060132181A1

公开(公告)日：2006-06-22

申请号：US11250117

申请日：2005-10-13

申请人： Jae-goo Lee ,  Im-soo Kang

发明人： Jae-goo Lee ,  Im-soo Kang

IPC分类号： H03K19/094

CPC分类号： H03K19/018585

摘要： Provided is a multi-path input buffer circuit, which passes a signal input to a semiconductor device through different paths in consideration of the voltage level of the input signal. The multi-path input buffer circuit includes an input buffer stage, which can be driven using one of at least two power supply voltages, outputs path signals by passing an input signal through at least two paths, selects and enables one of the path signals in response to a plurality of path selection signals, and maintains the rest of the path signals in a high impedance state. The buffer circuit also includes a level shifter, which shifts the voltage level of a signal output from the input buffer stage via the first path, and a first logic operation circuit, which operates in response to the output signal of the input buffer stage and a signal output from the level shifter.

摘要翻译： 提供了一种多路输入缓冲电路，其考虑到输入信号的电压电平，将通过不同路径的信号输入到半导体器件。 多路输入缓冲器电路包括可以使用至少两个电源电压之一驱动的输入缓冲器级，通过使输入信号通过至少两条路径来输出路径信号，选择并启用 响应于多个路径选择信号，并将其余路径信号保持在高阻抗状态。 缓冲电路还包括电平移位器，其通过第一路径移位从输入缓冲器级输出的信号的电压电平;以及第一逻辑运算电路，其响应于输入缓冲器级的输出信号和 来自电平转换器的信号输出。

公开(公告)号：US07365572B2

公开(公告)日：2008-04-29

申请号：US11250117

申请日：2005-10-13

申请人： Jae-goo Lee ,  Im-soo Kang

发明人： Jae-goo Lee ,  Im-soo Kang

IPC分类号： H03K19/0175

CPC分类号： H03K19/018585

摘要： Provided is a multi-path input buffer circuit, which passes a signal input to a semiconductor device through different paths in consideration of the voltage level of the input signal. The multi-path input buffer circuit includes an input buffer stage, which can be driven using one of at least two power supply voltages, outputs path signals by passing an input signal through at least two paths, selects and enables one of the path signals in response to a plurality of path selection signals, and maintains the rest of the path signals in a high impedance state. The buffer circuit also includes a level shifter, which shifts the voltage level of a signal output from the input buffer stage via the first path, and a first logic operation circuit, which operates in response to the output signal of the input buffer stage and a signal output from the level shifter.

摘要翻译： 提供了一种多路输入缓冲电路，其考虑到输入信号的电压电平，将通过不同路径的信号输入到半导体器件。 多路输入缓冲器电路包括可以使用至少两个电源电压之一驱动的输入缓冲器级，通过使输入信号通过至少两条路径来输出路径信号，选择并启用 响应于多个路径选择信号，并将其余路径信号保持在高阻抗状态。 缓冲电路还包括电平移位器，其通过第一路径移位从输入缓冲器级输出的信号的电压电平;以及第一逻辑运算电路，其响应于输入缓冲器级的输出信号和 来自电平转换器的信号输出。

公开(公告)号：US20110298590A1

公开(公告)日：2011-12-08

申请号：US13155457

申请日：2011-06-08

申请人： Seung-gun Lee ,  Young-min Song ,  Yong-jae Kim ,  Im-soo Kang

发明人： Seung-gun Lee ,  Young-min Song ,  Yong-jae Kim ,  Im-soo Kang

IPC分类号： H04Q5/22 ,  G09G5/00

CPC分类号： G06K7/0008 ,  G06F1/26 ,  G06F3/147 ,  G09G2330/021 ,  H04Q2213/095

摘要： A display driving integrated circuit operates as both a radio-frequency identification (RFID) reader and a display driver. The display driving integrated circuit operates as the RFID reader by supplying power to an RFID tag, verifying the RFID tag according to communication between the RFID tag and the processor to produce verification data, transferring the verification data from the processor to the RFID tag, and transmitting some of the verification data to the display unit. It operates as a display driver by processing data received from the processor and transferring the processed data to the display unit. The display driving integrated circuit implements functions for the RFID reader and the display unit driver using one or more shared elements selected from a timer, a clock signal generator, a cyclic redundancy check calculator, and a data interface.

摘要翻译： 显示驱动集成电路作为射频识别（RFID）读取器和显示驱动器而工作。 显示驱动集成电路作为RFID读取器通过向RFID标签供电，根据RFID标签与处理器之间的通信来验证RFID标签，以产生验证数据，将验证数据从处理器传送到RFID标签，以及 将一些验证数据发送到显示单元。 它通过处理从处理器接收的数据并将处理的数据传送到显示单元来作为显示驱动器。 显示驱动集成电路使用从定时器，时钟信号发生器，循环冗余校验计算器和数据接口中选择的一个或多个共享元件来实现RFID读取器和显示单元驱动器的功能。

公开(公告)号：US09041515B2

公开(公告)日：2015-05-26

申请号：US13155457

申请日：2011-06-08

申请人： Seung-gun Lee ,  Young-min Song ,  Yong-jae Kim ,  Im-soo Kang

发明人： Seung-gun Lee ,  Young-min Song ,  Yong-jae Kim ,  Im-soo Kang

IPC分类号： H04Q5/22 ,  G06K7/00 ,  G06F1/26 ,  G06F3/147

CPC分类号： G06K7/0008 ,  G06F1/26 ,  G06F3/147 ,  G09G2330/021 ,  H04Q2213/095

摘要： A display driving integrated circuit operates as both a radio-frequency identification (RFID) reader and a display driver. The display driving integrated circuit operates as the RFID reader by supplying power to an RFID tag, verifying the RFID tag according to communication between the RFID tag and the processor to produce verification data, transferring the verification data from the processor to the RFID tag, and transmitting some of the verification data to the display unit. It operates as a display driver by processing data received from the processor and transferring the processed data to the display unit. The display driving integrated circuit implements functions for the RFID reader and the display unit driver using one or more shared elements selected from a timer, a clock signal generator, a cyclic redundancy check calculator, and a data interface.

摘要翻译： 显示驱动集成电路作为射频识别（RFID）读取器和显示驱动器而工作。 显示驱动集成电路作为RFID读取器通过向RFID标签供电，根据RFID标签与处理器之间的通信来验证RFID标签，以产生验证数据，将验证数据从处理器传送到RFID标签，以及 将一些验证数据发送到显示单元。 它通过处理从处理器接收的数据并将处理的数据传送到显示单元来作为显示驱动器。 显示驱动集成电路使用从定时器，时钟信号发生器，循环冗余校验计算器和数据接口中选择的一个或多个共享元件来实现RFID读取器和显示单元驱动器的功能。