公开(公告)号：US20090110130A1

公开(公告)日：2009-04-30

申请号：US12112152

申请日：2008-04-30

申请人： James Boomer ,  Oscar Freitas ,  Steven Macaluso

发明人： James Boomer ,  Oscar Freitas ,  Steven Macaluso

IPC分类号： H04L7/00

CPC分类号： H04B3/30

摘要： A system and process for eliminating a control wire between logic systems that communicate with each other. In one embodiment, a system sends to a receiver a frequency that indicates a first mode. In the first mode a first data type may be sent. When the frequency is changed a second mode is indicated wherein a second data type may be sent. The receiver detects the frequency change and assumes the first or second mode as indicated.

摘要翻译： 用于消除彼此通信的逻辑系统之间的控制线的系统和过程。 在一个实施例中，系统向接收机发送指示第一模式的频率。 在第一模式中，可以发送第一数据类型。 当频率改变时，指示可以发送第二数据类型的第二模式。 接收机检测频率变化并采取所指示的第一或第二模式。

公开(公告)号：US08107575B2

公开(公告)日：2012-01-31

申请号：US12112152

申请日：2008-04-30

申请人： James Boomer ,  Oscar Freitas ,  Steven Macaluso

发明人： James Boomer ,  Oscar Freitas ,  Steven Macaluso

IPC分类号： H04L7/00

CPC分类号： H04B3/30

摘要： A system and process for eliminating a control wire between logic systems that communicate with each other. In one embodiment, a system sends to a receiver a frequency that indicates a first mode. In the first mode a first data type may be sent. When the frequency is changed a second mode is indicated wherein a second data type may be sent. The receiver detects the frequency change and assumes the first or second mode as indicated.

摘要翻译： 用于消除彼此通信的逻辑系统之间的控制线的系统和过程。 在一个实施例中，系统向接收机发送指示第一模式的频率。 在第一模式中，可以发送第一数据类型。 当频率改变时，指示可以发送第二数据类型的第二模式。 接收机检测频率变化并采取所指示的第一或第二模式。

公开(公告)号：US08321598B2

公开(公告)日：2012-11-27

申请号：US12112176

申请日：2008-04-30

申请人： James Boomer ,  Oscar Freitas

发明人： James Boomer ,  Oscar Freitas

IPC分类号： G06F3/00

CPC分类号： H03M11/20

摘要： A serializer/deserializer interfacing a keypad or keyboard to a processing system is illustrated. However, to minimize wires on intervening cables, a serializer and deserializer is inserted between the processor system and the keypad forming a virtual keypad. The processor scans the deserializer as if it were the keypad and the keypad is scanned by the serializer as if it were the processor. The serializer converts the scanning of the keypad into a serial bit stream and clock that is sent to the deserializer. The deserializer accepts the serial bit stream and reconfigures the data into a response that mimics the response of the physical keypad. In one embodiment an actual second keypad is formed in the deserializer and activated as the first keypad is activated.

摘要翻译： 示出了将键盘或键盘连接到处理系统的串行器/解串器。 然而，为了最小化插入电缆的电线，串行器和解串器插入在处理器系统和形成虚拟键盘的键盘之间。 处理器扫描解串器，就像它是键盘一样，键盘由串行器扫描，就像处理器一样。 串行器将键盘的扫描转换为串行位流和发送到解串器的时钟。 解串器接受串行位流，并将数据重新配置为模拟物理键盘响应的响应。 在一个实施例中，在解串器中形成实际的第二键盘，并且当第一键盘被激活时被激活。

公开(公告)号：US08170070B2

公开(公告)日：2012-05-01

申请号：US12112136

申请日：2008-04-30

申请人： James Boomer ,  Oscar Freitas

发明人： James Boomer ,  Oscar Freitas

IPC分类号： H04J3/02

CPC分类号： H04J3/047 ,  G09G5/006 ,  H04M1/0214 ,  H04M1/23 ,  H04M2250/52

摘要： A system for interleaving high speed data and slower data that is serialized and delivered to a microprocessor. The typical source of the high speed data is a camera and the source of the slower data is a keyboard. The high speed data and the slower data, illustratively, are interfaced with a micro-processor in a parallel fashion. The present invention mirrors the parallel interface to the microprocessor, and mirrors the parallel interface to the sources of the high speed (camera) and slower (keypad) data. The present system formats parallel data from the sources and passes that data in serial form, typically with a clock, on a flexible cable that joins two sections of many cell phones or other hand held devices.

摘要翻译： 用于交错高速数据和慢速数据的系统，其被串行化并传送到微处理器。 高速数据的典型来源是相机，较慢数据的来源是键盘。 示例性地，高速数据和较慢的数据以并行方式与微处理器接口。 本发明反映了与微处理器的并行接口，并且反映了与高速（摄像机）和较慢（小键盘）数据源的并行接口。 本系统将来自源的并行数据格式化，并将该数据以串行形式（通常为时钟）传送到连接许多手机或其他手持设备的两部分的柔性电缆上。

公开(公告)号：US20090106462A1

公开(公告)日：2009-04-23

申请号：US12112176

申请日：2008-04-30

申请人： James Boomer ,  Oscar Freitas

发明人： James Boomer ,  Oscar Freitas

IPC分类号： G06F3/02

CPC分类号： H03M11/20

摘要： A serializer/deserializer interfacing a keypad or keyboard to a processing system is illustrated. In one application, the processor is arranged to generate keypad scan and input keypad sense lines directly. However, to minimize wires on intervening cables, a serializer and deserializer is inserted between the processor system, the serializer/deserializer forming a virtual keypad. In this case, the processor scans the deserializer as if it were the keypad and the keypad is scanned by the serializer as if it were the processor. However, the serializer converts the scanning of the keypad into a serial bit stream that is sent to the deserializer using only a data line and a clock line. The deserializer accepts the serial bit stream and reconfigures the data into a response that mimics the response of the physical keypad as the computer system scans the virtual keypad, the deserializer. In one embodiment an actual second keypad is formed in the deserializer and activated as the first keypad is activated, wherein the computer scans the second keypad in the usual fashion.

摘要翻译： 示出了将键盘或键盘连接到处理系统的串行器/解串器。 在一个应用中，处理器被布置成直接产生键盘扫描和输入键盘感测线。 然而，为了最小化插入电缆的电线，串行器和解串器插入处理器系统之间，串行器/解串器形成虚拟键盘。 在这种情况下，处理器扫描解串器，就像它是键盘一样，键盘由串行器扫描，就像处理器一样。 然而，串行器将键盘的扫描转换成仅使用数据线和时钟线发送到解串器的串​​行比特流。 解串器接受串行位流，并将数据重新配置为当计算机系统扫描虚拟键盘（即串并行器）时模拟物理键盘的响应的响应。 在一个实施例中，在解串器中形成实际的第二键盘，并且当第一键盘被激活时被激活，其中计算机以通常的方式扫描第二键盘。

公开(公告)号：US20090116515A1

公开(公告)日：2009-05-07

申请号：US12112136

申请日：2008-04-30

申请人： James Boomer ,  Oscar Freitas

发明人： James Boomer ,  Oscar Freitas

IPC分类号： H04J3/02

CPC分类号： H04J3/047 ,  G09G5/006 ,  H04M1/0214 ,  H04M1/23 ,  H04M2250/52

摘要： A system for interleaving high speed data and slower data that is serialized and delivered to a microprocessor. The typical source of the high speed data is a camera and the source of the slower data is a keyboard. The high speed data and the slower data, illustratively, are interfaced with a micro-processor in a parallel fashion. The present invention mirrors the parallel interface to the microprocessor, and mirrors the parallel interface to the sources of the high speed (camera) and slower (keypad) data. The present system formats parallel data from the sources and passes that data in serial form, typically with a clock, on a flexible cable that joins two sections of many cell phones or other hand held devices.

摘要翻译： 用于交错高速数据和慢速数据的系统，其被串行化并传送到微处理器。 高速数据的典型来源是相机，较慢数据的来源是键盘。 示例性地，高速数据和较慢的数据以并行方式与微处理器接口。 本发明反映了与微处理器的并行接口，并且反映了与高速（摄像机）和较慢（小键盘）数据源的并行接口。 本系统将来自源的并行数据格式化，并将该数据以串行形式（通常为时钟）传送到连接许多手机或其他手持设备的两部分的柔性电缆上。

公开(公告)号：US20120019309A1

公开(公告)日：2012-01-26

申请号：US13188778

申请日：2011-07-22

申请人： John R. Turner ,  Seth M. Prentice ,  Oscar Freitas ,  Wonsoo Moon

发明人： John R. Turner ,  Seth M. Prentice ,  Oscar Freitas ,  Wonsoo Moon

IPC分类号： G01R29/00

CPC分类号： H03K5/1254

摘要： This document discusses, among other things, an audio jack detection circuit configured to be coupled to an audio jack receptacle of an external device. The audio jack detection circuit configured to receive to receive audio jack receptacle information, to disable an oscillator when the audio jack receptacle information indicates that the audio jack receptacle is empty, and to enable the oscillator when the audio jack receptacle information indicates that the audio jack receptacle includes an audio jack.

摘要翻译： 本文件尤其讨论了被配置为耦合到外部设备的音频插座的音频插座检测电路。 音频插孔检测电路被配置为接收音频插座信息，当音频插孔信息指示音频插孔插座为空时禁用振荡器，并且当音频插座信息指示音频插孔 插座包括音频插孔。

公开(公告)号：US08831234B2

公开(公告)日：2014-09-09

申请号：US13188778

申请日：2011-07-22

申请人： John R. Turner ,  Seth M. Prentice ,  Oscar Freitas ,  Wonsoo Moon

发明人： John R. Turner ,  Seth M. Prentice ,  Oscar Freitas ,  Wonsoo Moon

IPC分类号： H04R29/00 ,  H04B3/00 ,  H03K5/1254

CPC分类号： H03K5/1254

摘要： This document discusses, among other things, an audio jack detection circuit configured to be coupled to an audio jack receptacle of an external device. The audio jack detection circuit configured to receive to receive audio jack receptacle information, to disable an oscillator when the audio jack receptacle information indicates that the audio jack receptacle is empty, and to enable the oscillator when the audio jack receptacle information indicates that the audio jack receptacle includes an audio jack.

摘要翻译： 本文件尤其讨论了被配置为耦合到外部设备的音频插座的音频插座检测电路。 音频插孔检测电路被配置为接收音频插座信息，当音频插孔信息指示音频插孔插座为空时禁用振荡器，并且当音频插座信息指示音频插孔 插座包括音频插孔。