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公开(公告)号:US20160218027A1
公开(公告)日:2016-07-28
申请号:US14983101
申请日:2015-12-29
IPC分类号: H01L21/673
CPC分类号: H01L21/67369 , H01L21/67346 , H01L21/67366 , H01L21/67379 , H01L21/67389
摘要: Improvements in a single and dual stage wafer cushion is disclosed where the wafer cushion can use an edge hinge as a single first stage cushion and a second mid span hinge for the dual stage wafer cushion. This dual stage design gives two distinctly different cushioning forces as opposed to using a single stage design where the force is linear with the amount of compression that is being applied to the outer surfaces of the wafer cushion. The outside edge of the ring provides the greatest expansion such that only the outer edge of the ring makes contact with the outer edge of a wafer. The wafer cushion is a material that flexes and absorbs shocks before the shock is transferred to the wafer stack. The material minimizes debris or contaminants from embedding into the wafer cushion and also prevents sheading of material from the wafer cushion.
摘要翻译: 公开了一种单级和双级晶片衬垫的改进,其中晶片衬垫可以使用作为单级第一级衬垫的边缘铰链和用于双级晶片衬垫的第二中间跨接铰链。 这种双级设计提供了两种明显不同的缓冲力,而不是使用单级设计,其中力与施加到晶片垫的外表面的压缩量成线性关系。 环的外边缘提供最大的膨胀,使得只有环的外边缘与晶片的外边缘接触。 晶片垫是在冲击传递到晶片堆栈之前弯曲和吸收冲击的材料。 该材料使碎片或污染物最小化,从而嵌入到晶片衬垫中,并且还防止材料从晶片衬垫的剪切。
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公开(公告)号:US08286797B2
公开(公告)日:2012-10-16
申请号:US13436812
申请日:2012-03-30
申请人: James D. Pylant , Alan L. Waber
发明人: James D. Pylant , Alan L. Waber
IPC分类号: B65D85/30
CPC分类号: H01L21/67386 , H01L21/67353 , H01L21/67366 , H01L21/67369 , H01L21/67373 , H01L21/67379
摘要: Improvements in a semiconductor wafer container including improvements in side protection to the wafers, improved cover design to minimize rotation, a simplified top cover orientation mechanism and an improved bottom holding mechanism for automation. The side protection to the wafers is with multiple staggered inner and outer walls. The improved cover design improves alignment of the top and bottom housings and minimizes rotation of the housings in transit or motion. The housings have a recessed tab ramp feature with bi-directional locking that also increases the rigidity of the containment device when the two housings are assembled. The improved bottom holding mechanism for automation is an integrated feature that is molded into the bottom housing and not assembled in a secondary operation. The molded integration reduces tolerance errors that are present in assembling multiple pieces and joining multiple pieces.
摘要翻译: 半导体晶片容器的改进,包括对晶片的侧面保护的改进,改进的盖设计以使旋转最小化,简化的顶盖定向机构和用于自动化的改进的底部保持机构。 对晶片的侧面保护是具有多个交错的内壁和外壁。 改进的盖设计改善了顶部和底部壳体的对准,并最大限度地减少了运输或运动中壳体的旋转。 这些外壳具有带双向锁定的凹陷突出部斜面特征,当两个壳体组装时,这也增加了容纳装置的刚度。 用于自动化的改进的底部保持机构是模制到底部壳体中并且未组装在二次操作中的集成特征。 模制集成减少了组装多个零件并连接多个零件时出现的公差错误。
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公开(公告)号:US08528737B2
公开(公告)日:2013-09-10
申请号:US13367365
申请日:2012-02-06
申请人: James D. Pylant , Alan L. Waber
发明人: James D. Pylant , Alan L. Waber
IPC分类号: B65D85/30
CPC分类号: H01L21/67386 , H01L21/67353 , H01L21/67366 , H01L21/67369 , H01L21/67373 , H01L21/67379
摘要: Improvements in a semiconductor wafer container including improvements in side protection to the wafers, improved cover design to minimize rotation, a simplified top cover orientation mechanism and an improved bottom holding mechanism for automation. The side protection to the wafers is with multiple staggered inner and outer walls. The improved cover design improves alignment of the top and bottom housings and minimizes rotation of the housings in transit or motion. The housings have a recessed tab ramp feature with bi-directional locking that also increases the rigidity of the containment device when the two housings are assembled. The improved bottom holding mechanism for automation is an integrated feature that is molded into the bottom housing and not assembled in a secondary operation. The molded integration reduces tolerance errors that are present in assembling multiple pieces and joining multiple pieces.
摘要翻译: 半导体晶片容器的改进,包括对晶片的侧面保护的改进,改进的盖设计以使旋转最小化,简化的顶盖定向机构和用于自动化的改进的底部保持机构。 对晶片的侧面保护是具有多个交错的内壁和外壁。 改进的盖设计改善了顶部和底部壳体的对准,并最大限度地减少了运输或运动中壳体的旋转。 这些外壳具有带双向锁定的凹陷突出部斜面特征,当两个壳体组装时,这也增加了容纳装置的刚度。 用于自动化的改进的底部保持机构是模制到底部壳体中并且未组装在二次操作中的集成特征。 模制集成减少了组装多个零件并连接多个零件时出现的公差错误。
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