Apparatus and method to facilitate self-correcting memory
    1.
    发明授权
    Apparatus and method to facilitate self-correcting memory 有权
    便于自校正记忆的装置和方法

    公开(公告)号:US06859904B2

    公开(公告)日:2005-02-22

    申请号:US09854095

    申请日:2001-05-11

    CPC分类号: G06F11/106 G06F11/1064

    摘要: One embodiment of the present invention provides a system that facilitates self-correcting memory in a shared-memory system. The system includes a main memory coupled to a memory controller for reading and writing memory locations and for marking memory locations that have been checked out to a cache. The system also includes a processor cache for storing data currently in use by a central processing unit. A communication channel is coupled between the processor cache and the memory controller to facilitate communication. The memory controller includes an error detection and correction mechanism and also includes a mechanism for reading data from the processor cache when a currently valid copy of the data is checked out to the processor cache. When the data is returned to the memory subsystem from the cache, the error detection and correction mechanism corrects errors and stores a corrected copy of the data in the main memory.

    摘要翻译: 本发明的一个实施例提供一种促进共享存储器系统中的自校正存储器的系统。 该系统包括耦合到存储器控制器的主存储器,用于读取和写入存储器位置,并用于标记已经检出到高速缓存的存储器位置。 该系统还包括用于存储中央处理单元当前使用的数据的处理器高速缓存。 通信信道耦合在处理器高速缓存和存储器控制器之间以便于通信。 存储器控制器包括错误检测和校正机制,并且还包括用于当当前有效的数据副本被检出到处理器高速缓存时从处理器高速缓存读取数据的机制。 当数据从高速缓存返回到存储器子系统时,错误检测和校正机构校正错误并将修正的数据副本存储在主存储器中。

    Method and apparatus for storing prior versions of modified values to facilitate reliable execution
    2.
    发明授权
    Method and apparatus for storing prior versions of modified values to facilitate reliable execution 有权
    用于存储先前版本的修改值以便于可靠执行的方法和装置

    公开(公告)号:US06766428B2

    公开(公告)日:2004-07-20

    申请号:US09827437

    申请日:2001-04-06

    IPC分类号: G06F1300

    CPC分类号: G06F11/1471

    摘要: One embodiment of the present invention provides a system that facilitates reliable execution in a computer system by keeping track of write operations to a main memory of the computer system in order to undo the write operations if necessary. This system operates by receiving a write operation directed to the main memory at a memory controller, wherein the write operation includes data to be written to the main memory and a write address specifying a location in the main memory into which the data is to be written. Next, the system examines a log bit associated with the write address, wherein the log bit indicates whether an existing value from the write address in main memory has been copied to a checkpoint store. If the log bit is not set, the system creates a new entry for the write address in the checkpoint store; retrieves an existing value from the write address in the main memory; and stores the existing value to the new entry in the checkpoint store. The system then stores the data to be written to write address in the main memory. The system also periodically performs a checkpointing operation, which clears all entries from the checkpoint store.

    摘要翻译: 本发明的一个实施例提供了一种系统,其通过跟踪对计算机系统的主存储器的写入操作来促进计算机系统中的可靠执行,以便在需要时撤销写入操作。 该系统通过在存储器控制器处接收针对主存储器的写入操作来操作,其中写入操作包括要写入主存储器的数据和指定要在其中写入数据的主存储器中的位置的写入地址 。 接下来,系统检查与写入地址相关联的日志位,其中日志位指示主存储器中的写入地址中的现有值是否已被复制到检查点存储。 如果日志位未设置,系统将在检查点存储中创建写入地址的新条目; 从主存储器中的写入地址检索现有值; 并将现有值存储在检查点存储中的新条目中。 然后,系统将要写入的数据存储在主存储器中的写入地址。 该系统还定期执行检查点操作,该操作清除检查点存储中的所有条目。

    Method and apparatus for checkpointing to facilitate reliable execution
    3.
    发明授权
    Method and apparatus for checkpointing to facilitate reliable execution 有权
    用于检查点的方法和装置,以便于可靠执行

    公开(公告)号:US06779087B2

    公开(公告)日:2004-08-17

    申请号:US09827426

    申请日:2001-04-06

    IPC分类号: G06F1200

    CPC分类号: G06F11/1471

    摘要: One embodiment of the present invention provides a system that facilitates reliable execution in a computer system by periodically checkpointing write operations to a main memory of the computer system. The system operates by receiving a write operation directed to the main memory at a memory controller, wherein the write operation includes data to be written to the main memory and a write address specifying a location in the main memory into which the data is to be written. Next, the system looks up the write address in a checkpoint store coupled to the memory controller. If the write address is not associated with any entry in the checkpoint store, the system creates an entry for the write address in the checkpoint store, and writes the data to be written to the entry. The system then periodically performs a checkpointing operation, which transfers the data to be written from the checkpoint store to the write address in the main memory.

    摘要翻译: 本发明的一个实施例提供了一种通过周期性地检查对计算机系统的主存储器的写入操作来促进计算机系统中的可靠执行的系统。 该系统通过在存储器控制器处接收指向主存储器的写入操作来操作,其中写入操作包括要写入主存储器的数据和指定要在其中写入数据的主存储器中的位置的写入地址 。 接下来,系统在耦合到存储器控制器的检查点存储中查找写入地址。 如果写入地址与检查点存储中的任何条目不相关联,则系统将在检查点存储中创建写入地址的条目,并将要写入的数据写入条目。 然后,系统周期性地执行检查点操作,其将要从写入检查点存储的数据传送到主存储器中的写入地址。