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    METHOD FOR REPLACING OR PATCHING ELEMENT OF DISPLAY DEVICE
    1.
    发明申请
    METHOD FOR REPLACING OR PATCHING ELEMENT OF DISPLAY DEVICE 有权

    公开(公告)号：US20210015011A1

    公开(公告)日：2021-01-14

    申请号：US16505717

    申请日：2019-07-09

    申请人： MIKRO MESA TECHNOLOGY CO., LTD.

    发明人： Li-Yi CHEN

    IPC分类号： H05K13/04 ,  H05K10/00 ,  H01L21/683

    摘要： A method for replacing an element of a display device includes: forming a structure with a first liquid layer between a first micro device and a conductive pad of a substrate in which the first micro device is gripped by a capillary force produced by the first liquid layer; evaporating the first liquid layer such that the first micro device is bound to the substrate; determining if the first micro device is malfunctioned or misplaced; removing the first micro device when the first micro device is malfunctioned or misplaced; forming an another structure with a second liquid layer between a second micro device and the conductive pad of the substrate in which the second micro device is gripped by a capillary force produced by the second liquid layer; and evaporating the second liquid layer such that the second micro device is bound to the substrate.

    Defect registration method of magnetic disk, and magnetic disk drive
    2.
    发明授权
    Defect registration method of magnetic disk, and magnetic disk drive 失效
    磁盘缺陷注册方法和磁盘驱动器

    公开(公告)号：US07583461B2

    公开(公告)日：2009-09-01

    申请号：US11223068

    申请日：2005-09-08

    申请人： Masaki Kudoh ,  Toshiaki Satoh

    发明人： Masaki Kudoh ,  Toshiaki Satoh

    IPC分类号： G11B5/09 ,  G11B27/36 ,  G06F11/00 ,  H05K10/00

    CPC分类号： G11B20/1883 ,  G11B19/04 ,  G11B2220/20

    摘要： Embodiments of the present invention provide a defect registration method for performing defect registration of sectors on a magnetic disk. In one embodiment, a rectangular detection window is applied to each defect sector. A threshold value of the detection window is set at 2. In addition, an additional sector group is defined for the detection window. The additional sector group is a target of the defect registration if the number of defect sectors exceeds the threshold value. The additional sector group covers sectors that are not judged as defects in defect detection inspection, but that are expected to be potentially defective. Even if the detection window is applied to a defect sector, an additional sector group is not generated. However, if the detection window is applied to a defect sector, an additional sector group is generated. If the detection window is applied to a defect pattern, an additional sector group is generated.

    摘要翻译： 本发明的实施例提供一种用于执行磁盘上的扇区的缺陷登记的缺陷登记方法。 在一个实施例中，矩形检测窗口被应用于每个缺陷扇区。 检测窗口的阈值设置为2.另外，为检测窗口定义了附加扇区组。 如果缺陷扇区的数量超过阈值，则附加扇区组是缺陷注册的目标。 额外的部门组包括不被视为缺陷检测检查缺陷的部门，但预计会有潜在的缺陷。 即使将检测窗口应用于缺陷扇区，也不会生成附加扇区组。 然而，如果将检测窗口应用于缺陷扇区，则生成附加扇区组。 如果将检测窗口应用于缺陷图案，则生成附加扇区组。

    Method and apparatus for isolating aircraft equipment
    4.
    发明申请
    Method and apparatus for isolating aircraft equipment 有权
    用于隔离飞机设备的方法和装置

    公开(公告)号：US20050228549A1

    公开(公告)日：2005-10-13

    申请号：US10822657

    申请日：2004-04-13

    申请人： Bjorn Stickling

    发明人： Bjorn Stickling

    IPC分类号： B64C19/00 ,  B64D43/00 ,  G06F17/00 ,  H04B15/00 ,  H04B15/02 ,  H05K10/00

    CPC分类号： H04B15/00

    摘要： A system and method for interfacing equipment with flight Aircraft Equipment without causing interference between same. An isolation module includes transmission and power control functionality for ensuring safe and secure operation of the equipment on the aircraft.

    摘要翻译： 用于将设备与飞行器材设备接口的系统和方法，而不会造成相同的干扰。 隔离模块包括传输和电源控制功能，用于确保飞机上设备的安全可靠运行。

    Data integrity error handling in a redundant storage array
    5.
    发明授权
    Data integrity error handling in a redundant storage array 有权
    冗余存储阵列中的数据完整性错误处理

    公开(公告)号：US06934904B2

    公开(公告)日：2005-08-23

    申请号：US09846374

    申请日：2001-04-30

    申请人： Nisha D. Talagala ,  Chia Y. Wu

    发明人： Nisha D. Talagala ,  Chia Y. Wu

    IPC分类号： G06F11/00 ,  G06F11/10 ,  G11B20/00 ,  G11C29/00 ,  H02H3/05 ,  H03K19/003 ,  H04B1/74 ,  H04L1/22 ,  H05K10/00

    CPC分类号： G06F11/1076 ,  G06F2211/1059

    摘要： Data integrity errors in a redundant storage array are handled by storing a plurality of data blocks having a horizontal redundant relationship and storing a plurality of checksums, each checksum having a vertical redundant relationship with a corresponding one of the plurality of data blocks. In response to detection of a data integrity error in at least one of the plurality of data blocks, the vertical redundant relationships between each of the checksums in the plurality of checksums and the corresponding data blocks are reviewed and the horizontal redundant relationship between the data block having the data integrity error and the remaining data blocks in the plurality of data blocks is also reviewed. The results of these reviews of the redundant relationships can be used to diagnose and repair the data integrity error.

    摘要翻译： 通过存储具有水平冗余关系的多个数据块并存储多个校验和来处理冗余存储阵列中的数据完整性错误，每个校验和与多个数据块中的相应一个数据块具有垂直冗余关系。 响应于在多个数据块中的至少一个数据块中检测到数据完整性错误，检查多个校验和中的每个校验和与对应的数据块之间的垂直冗余关系，并且数据块之间的水平冗余关系 还审查数据完整性错误和多个数据块中的剩余数据块。 冗余关系的这些审查结果可用于诊断和修复数据完整性错误。

    Apparatus and method to facilitate self-correcting memory
    8.
    发明授权
    Apparatus and method to facilitate self-correcting memory 有权
    便于自校正记忆的装置和方法

    公开(公告)号：US06859904B2

    公开(公告)日：2005-02-22

    申请号：US09854095

    申请日：2001-05-11

    申请人： James E. Kocol ,  Ashley N. Saulsbury ,  Sandra C. Lee

    发明人： James E. Kocol ,  Ashley N. Saulsbury ,  Sandra C. Lee

    IPC分类号： G06F11/10 ,  G06F12/00 ,  G11C7/00 ,  G11C29/00 ,  H02H3/05 ,  H03K19/003 ,  H04B1/74 ,  H04L1/22 ,  H05K10/00

    CPC分类号： G06F11/106 ,  G06F11/1064

    摘要： One embodiment of the present invention provides a system that facilitates self-correcting memory in a shared-memory system. The system includes a main memory coupled to a memory controller for reading and writing memory locations and for marking memory locations that have been checked out to a cache. The system also includes a processor cache for storing data currently in use by a central processing unit. A communication channel is coupled between the processor cache and the memory controller to facilitate communication. The memory controller includes an error detection and correction mechanism and also includes a mechanism for reading data from the processor cache when a currently valid copy of the data is checked out to the processor cache. When the data is returned to the memory subsystem from the cache, the error detection and correction mechanism corrects errors and stores a corrected copy of the data in the main memory.

    摘要翻译： 本发明的一个实施例提供一种促进共享存储器系统中的自校正存储器的系统。 该系统包括耦合到存储器控制器的主存储器，用于读取和写入存储器位置，并用于标记已经检出到高速缓存的存储器位置。 该系统还包括用于存储中央处理单元当前使用的数据的处理器高速缓存。 通信信道耦合在处理器高速缓存和存储器控制器之间以便于通信。 存储器控制器包括错误检测和校正机制，并且还包括用于当当前有效的数据副本被检出到处理器高速缓存时从处理器高速缓存读取数据的机制。 当数据从高速缓存返回到存储器子系统时，错误检测和校正机构校正错误并将修正的数据副本存储在主存储器中。

    Method and apparatus for testing a circuit module concurrently with a non-volatile memory operation in a multi-module data processing system
    10.
    发明授权
    Method and apparatus for testing a circuit module concurrently with a non-volatile memory operation in a multi-module data processing system 失效
    用于在多模块数据处理系统中与非易失性存储器操作同时测试电路模块的方法和装置

    公开(公告)号：US6076177A

    公开(公告)日：2000-06-13

    申请号：US935572

    申请日：1997-09-23

    申请人： Ivan James Fontenot ,  Thomas R. Toms

    发明人： Ivan James Fontenot ,  Thomas R. Toms

    IPC分类号： G01R31/28 ,  G06F11/26 ,  H05K10/00

    CPC分类号： G06F11/26 ,  G11C29/1201 ,  G11C29/48 ,  G11C16/04 ,  G11C16/16 ,  G11C2029/2602 ,  G11C5/04

    摘要： Testing of a multi-module data processing system (20) includes performing a functional test on a module (42, 44, 46, 48, 50, 54) concurrently with an erase operation of a non-volatile memory module (34, 36). Because the erase operation requires multiple clock cycles to complete, and little or no interaction with a tester, a set of test patterns may be run on one or more of the modules (42, 44, 46, 48, 50, 54) while the erase operation is being performed. Between each test pattern, a special reset signal is provided to a reset unit (39) of a system integration unit (38). The special reset signal resets the modules (42, 44, 46, 48, 50, 54), without affecting the erase operation of the flash memory module (34, 36), in order to perform each test of the modules (42, 44, 46, 48, 50, 54) from a known state. Concurrent testing in this manner reduces the time required to test a multi-module data processing system.

    摘要翻译： 多模块数据处理系统（20）的测试包括与非易失性存储器模块（34,36）的擦除操作同时执行对模块（42,44,46,48,50,54）的功能测试， 。 因为擦除操作需要多个时钟周期来完成，并且与测试器的交互很少或没有交互，所以可以在一个或多个模块（42,44,46,48,50,54）上运行一组测试模式，同时 正在执行擦除操作。 在每个测试图案之间，向系统集成单元（38）的复位单元（39）提供特殊的复位信号。 特殊复位信号复位模块（42,44,46,48,50,54），而不影响闪存模块（34,36）的擦除操作，以便对模块（42,44）进行每次测试 ，46,48,50,54）。 以这种方式并行测试可以减少测试多模块数据处理系统所需的时间。