Multi-channel algorithm infrastructure for programmable hardware elements
    1.
    发明授权
    Multi-channel algorithm infrastructure for programmable hardware elements 有权
    用于可编程硬件元件的多通道算法基础设施

    公开(公告)号:US08122238B2

    公开(公告)日:2012-02-21

    申请号:US12104901

    申请日:2008-04-17

    IPC分类号: G06F1/24 G06F9/00

    CPC分类号: G06F17/5054

    摘要: System and method for implementing multi-channel operations in a programmable hardware element (PHE). A hardware configuration program, including a processing function, inputs and outputs of the processing function, a plurality of channels, and channel scanning functionality for the plurality of channels, is specified. A PHE is configured with the hardware configuration program, including implementing the processing function and the channel scanning functionality on the PHE. A respective state and configuration of each of the plurality of channels is stored in a memory of the PHE to enable logic-sharing between each of the plurality of channels. The PHE is operated, including performing channel scanning on the plurality of channels, and updating the configuration of one or more of the channels in the memory of the PHE without interrupting the channel scanning, without taking any of the channels offline, and/or without interrupting a continuity of an output of the PHE.

    摘要翻译: 用于在可编程硬件元件(PHE)中实现多通道操作的系统和方法。 指定包括处理功能,处理功能的输入和输出,多个通道和用于多个通道的通道扫描功能的硬件配置程序。 PHE配置有硬件配置程序,包括在PHE上实现处理功能和通道扫描功能。 多个通道中的每一个的相应状态和配置被存储在PHE的存储器中,以使多个通道中的每一个之间能够进行逻辑共享。 PHE被操作,包括在多个通道上执行频道扫描,以及更新PHE的存储器中的一个或多个频道的配置,而不中断频道扫描,而不使任何频道离线,和/或不 中断PHE输出的连续性。

    METHOD AND SYSTEM FOR PROTECTING PRODUCTS AND TECHNOLOGY FROM INTEGRATED CIRCUITS WHICH HAVE BEEN SUBJECT TO TAMPERING, STRESSING AND REPLACEMENT AS WELL AS DETECTING INTEGRATED CIRCUITS THAT HAVE BEEN SUBJECT TO TAMPERING
    2.
    发明申请
    METHOD AND SYSTEM FOR PROTECTING PRODUCTS AND TECHNOLOGY FROM INTEGRATED CIRCUITS WHICH HAVE BEEN SUBJECT TO TAMPERING, STRESSING AND REPLACEMENT AS WELL AS DETECTING INTEGRATED CIRCUITS THAT HAVE BEEN SUBJECT TO TAMPERING 有权
    用于保护产品和技术的方法和系统,从集成电路中进行篡改,压缩和更换,以及检测已被篡改的集成电路

    公开(公告)号:US20110234241A1

    公开(公告)日:2011-09-29

    申请号:US13094331

    申请日:2011-04-26

    IPC分类号: G01R27/28

    摘要: A system employs physical unclonable functions of an integrated circuit for detecting integrated circuits and protecting products and technology from integrated circuits which have been subject to tampering, stressing and replacement, and counterfeit components. The system includes a sensor detecting a characteristic impedance generated as a result of controlled access to a memory device of the integrated circuit. The characteristic impedance is applied in the creation of a discrimination matrix of values based on electrical interface signals for the integrated circuit. The sensor includes a ring oscillator and associated monitoring components. The ring oscillator is composed of the memory device of the integrated circuit and a sensory circuitry, wherein changes in a frequency generated by the ring oscillator is indicative of changes in circuitry.

    摘要翻译: 系统采用集成电路的物理不可克隆功能,用于检测集成电路,并保护产品和技术免受已经受到篡改,压力和更换的伪装元件和集成电路的影响。 该系统包括一个传感器,该传感器检测由集成电路的存储器件的受控访问而产生的特性阻抗。 在基于用于集成电路的电接口信号的值的识别矩阵的创建中应用特征阻抗。 该传感器包括一个环形振荡器和相关的监控组件。 环形振荡器由集成电路的存储器件和感觉电路组成,其中由环形振荡器产生的频率的变化指示电路的变化。

    METHOD AND SYSTEM FOR DETECTION OF TAMPERING RELATED TO REVERSE ENGINEERING
    3.
    发明申请
    METHOD AND SYSTEM FOR DETECTION OF TAMPERING RELATED TO REVERSE ENGINEERING 有权
    用于检测与反向工程相关的夯实的方法和系统

    公开(公告)号:US20100213951A1

    公开(公告)日:2010-08-26

    申请号:US12487693

    申请日:2009-06-19

    申请人: James M. Lewis

    发明人: James M. Lewis

    IPC分类号: G01R27/28 G06F19/00

    摘要: A sensor system for protecting products and technology from reverse engineering by detecting attempts to probe electronic circuitry includes a sensor electrically linked to electronic circuitry. The sensor detects interaction of probe devices with the electronic circuitry for the purpose of reverse engineering the electronic circuitry. The sensor includes an exciter and an impedance counter linked to the exciter. A count rate of the impedance counter is a function of the impedance of the electronic circuitry due to the fact that oscillation frequency generated by the exciter is also a function of the impedance of the electronic circuitry. The sensor also includes an impedance register storing the binary count value from the impedance counter, wherein after the impedance counter data is transferred into the impedance register, the data is referred to as impedance data. The sensor also includes a reference oscillator monitoring count rate of the impedance counter and a sensor evaluation system comparing the impedance value to threshold values to determine if a significant change has occurred. When changes have occurred this is indicative of abnormal behavior and may be indicative of tampering relating to the evaluation of the electronic circuit for the purpose of reverse engineering.

    摘要翻译: 用于通过检测探测电子电路的尝试来保护产品和技术免受逆向工程的传感器系统包括电连接到电子电路的传感器。 传感器检测探针设备与电子电路的相互作用,以便逆向工程化电子电路。 该传感器包括一个与励磁机相连的励磁机和阻抗计数器。 阻抗计数器的计数率是电子电路的阻抗的函数,这是由于由激励器产生的振荡频率也是电子电路的阻抗的函数。 该传感器还包括一个阻抗寄存器,该阻抗寄存器存储来自阻抗计数器的二进制计数值,其中在阻抗计数器数据被传送到阻抗寄存器中之后,数据被称为阻抗数据。 传感器还包括阻抗计数器的参考振荡器监视计数率和将阻抗值与阈值进行比较的传感器评估系统,以确定是否发生了显着变化。 当发生变化时,这表示异常行为,并且可能表示与用于逆向工程的电子电路的评估有关的篡改。

    Resonant circuit control system for stepper motors
    4.
    发明授权
    Resonant circuit control system for stepper motors 失效
    用于步进电机的谐振电路控制系统

    公开(公告)号:US06307345B1

    公开(公告)日:2001-10-23

    申请号:US09495709

    申请日:2000-02-01

    申请人: James M. Lewis

    发明人: James M. Lewis

    IPC分类号: H02P800

    CPC分类号: H02P8/14

    摘要: A stepper motor control system is disclosed. The stepper motor including a rotor positioned within a stator for relative motion. The stepper motor further includes a control system associated with the stator and rotor for controlling relative motion. The control system is a resonant circuit which conserves electrical charge includes a first winding positioned between a first electrical charge source and a first capacitor assembly; a first switch controlling the flow of electrical charge between the first electrical charge source and the first capacitor assembly through the first winding in a first direction; and a second switch controlling the flow of electrical charge from the first capacitor assembly and through the first winding in a second direction. In use, phase one begins with the opening of the first switch, causing the flow of electrical charge through the first winding in a first direction and a predetermined relative movement between the stator and rotor. Phase two begins by closing the first switch and opening the second switch to cause the flow of electrical charge in the second direction from the first capacitor assembly and through the first winding. This causes a predetermined relative movement between the stator and rotor.

    摘要翻译: 公开了一种步进电机控制系统。 该步进电动机包括位于定子内的用于相对运动的转子。 步进电机还包括与定子和转子相关的控制系统,用于控制相对运动。 控制系统是保存电荷的谐振电路,包括位于第一电荷源和第一电容器组件之间的第一绕组; 第一开关,通过所述第一绕组在第一方向上控制所述第一电荷源和所述第一电容器组件之间的电荷流动; 以及第二开关,其控制来自第一电容器组件的电荷的流动并且在第二方向上通过第一绕组。 在使用中,第一阶段从第一开关的开启开始,导致在第一方向上的电荷流过第一绕组,并在定子和转子之间产生预定的相对运动。 第二阶段通过闭合第一开关并打开第二开关来引起来自第一电容器组件和第一绕组的第二方向的电荷流动。 这导致定子和转子之间的预定的相对运动。

    High contrast photoresist developer
    5.
    发明授权
    High contrast photoresist developer 失效
    高对比度光刻胶显影剂

    公开(公告)号:US4824769A

    公开(公告)日:1989-04-25

    申请号:US43380

    申请日:1987-04-28

    IPC分类号: G03F7/32

    CPC分类号: G03F7/322

    摘要: A positive photoresist metal ion aqueous developer is provided that gives a high contrast to the photoresist.The developer disclosed comprises a formulation of aqueous alkali-base such as potassium hydroxide and a carboxylated surfactant. The incorporation of the carboxylated surfactant provides the unexpected increase in the contrast of the photoresist. The addition of the carboxylated surfactant increases the gamma from a typical photoresist gamma (.gamma.) of 3 or less to a gamma greater than 5.The high contrast photoresist provides linewidth control and affords improved process latitude in photoresist imaging. The linewidth control is particularly critical in cases where fine lines are to be defined in the resist that covers steps of topography on the coated substrate. The higher the contrast, the less affected the resist by the topography, provided the exposure is adequate to expose the resist. The process latitude afforded by the high contrast is a result of the ability to over develop (develop longer) the exposed resist without affecting the unexposed resist in the adjacent areas.

    摘要翻译: 提供正光致抗蚀剂金属离子水性显影剂,其对光致抗蚀剂提供高对比度。 所公开的显影剂包括碱性水溶液如氢氧化钾和羧化表面活性剂的制剂。 羧化表面活性剂的引入提供了光致抗蚀剂的对比度的意外增加。 羧化表面活性剂的添加使得从典型的3或更小的光致抗蚀剂的伽玛(γ)增加到大于5的伽马。高对比度光致抗蚀剂提供线宽控制,并且在光致抗蚀剂成像中提供改进的工艺自由度。 在覆盖涂层基底上的形貌的步骤的抗蚀剂中限定细线的情况下,线宽控制是特别关键的。 对比度越高,受地形影响的抗蚀剂越少,只要曝光足以暴露抗蚀剂。 由高对比度提供的工艺纬度是在暴露的抗蚀剂中过度开发(展开更长时间)的能力而不影响相邻区域中未曝光的抗蚀剂的结果。

    Method and system for identifying counterfeit programmable logic devices
    7.
    发明授权
    Method and system for identifying counterfeit programmable logic devices 有权
    识别伪造可编程逻辑器件的方法和系统

    公开(公告)号:US08384415B2

    公开(公告)日:2013-02-26

    申请号:US13397232

    申请日:2012-02-15

    申请人: James M. Lewis

    发明人: James M. Lewis

    IPC分类号: H03K19/00

    CPC分类号: H03K19/17776

    摘要: A method for combating counterfeiting and tampering of integrated circuits includes the steps providing a programmable logic device, the programmable logic device including an arithmetic circuit implemented into the substrate, and constructing an arithmetic feedback oscillator using the arithmetic circuit. The step of constructing the arithmetic feedback oscillator includes incorporating a feedback loop into the arithmetic circuit and feeding output bits back into an input of the arithmetic circuit. The method also includes the step of selecting input values producing repeating values in a lesser order bit of a product of the arithmetic circuit when first and second input are applied to the arithmetic circuit and monitoring the lesser order bit and determining a predicted pattern.

    摘要翻译: 一种用于防止集成电路的假冒和篡改的方法包括提供可编程逻辑器件的步骤,该可编程逻辑器件包括实现到衬底中的运算电路,以及使用运算电路构造算术反馈振荡器。 构造算术反馈振荡器的步骤包括将反馈回路结合到运算电路中,并将输出位馈送回运算电路的输入端。 该方法还包括当将第一和第二输入应用于运算电路并监视较低阶位并确定预测图案时,选择产生运算电路的乘积的较小位的重复值的输入值的步骤。

    METHOD AND SYSTEM FOR IDENTIFYING COUNTERFEIT PROGRAMMABLE LOGIC DEVICES
    8.
    发明申请
    METHOD AND SYSTEM FOR IDENTIFYING COUNTERFEIT PROGRAMMABLE LOGIC DEVICES 有权
    用于识别可编程逻辑器件的方法和系统

    公开(公告)号:US20120212253A1

    公开(公告)日:2012-08-23

    申请号:US13397232

    申请日:2012-02-15

    申请人: James M. Lewis

    发明人: James M. Lewis

    IPC分类号: H03K19/00

    CPC分类号: H03K19/17776

    摘要: A method for combating counterfeiting and tampering of integrated circuits includes the steps providing a programmable logic device, the programmable logic device including an arithmetic circuit implemented into the substrate, and constructing an arithmetic feedback oscillator using the arithmetic circuit. The step of constructing the arithmetic feedback oscillator includes incorporating a feedback loop into the arithmetic circuit and feeding output bits back into an input of the arithmetic circuit. The method also includes the step of selecting input values producing repeating values in a lesser order bit of a product of the arithmetic circuit when first and second input are applied to the arithmetic circuit and monitoring the lesser order bit and determining a predicted pattern.

    摘要翻译: 一种用于防止集成电路的假冒和篡改的方法包括提供可编程逻辑器件的步骤,该可编程逻辑器件包括实现到衬底中的运算电路,以及使用运算电路构造算术反馈振荡器。 构造算术反馈振荡器的步骤包括将反馈回路结合到运算电路中,并将输出位馈送回运算电路的输入端。 该方法还包括当将第一和第二输入应用于运算电路并监视较低阶位并确定预测图案时,选择产生运算电路的乘积的较小位的重复值的输入值的步骤。

    Self-modifying FPGA for anti-tamper applications
    9.
    发明授权
    Self-modifying FPGA for anti-tamper applications 有权
    用于防篡改应用的自修改FPGA

    公开(公告)号:US08159259B1

    公开(公告)日:2012-04-17

    申请号:US11882803

    申请日:2007-08-06

    IPC分类号: H03K19/00 G06F12/14 G06F13/00

    CPC分类号: H03K19/177 G06F2213/0038

    摘要: A self-modifying FPGA system includes an FPGA and a configuration memory device coupled to the FPGA for providing the FPGA with configuration information. The configuration memory device is programmed with configuration data and dormant data. The FPGA system is also provided with a configuration assist circuit coupled to the FPGA and the configuration memory device for controlling loading of configuration information from the configuration memory device to the FPGA. A tamper detection system provides a tamper signal to the FPGA, wherein when a tamper signal is received by the FPGA the configuration data is replaced with the dormant data.

    摘要翻译: 自修改FPGA系统包括耦合到FPGA的FPGA和配置存储器件,用于向FPGA提供配置信息。 配置存储器设备使用配置数据和休眠数据进行编程。 FPGA系统还具有耦合到FPGA的配置辅助电路和配置存储器件,用于控制从配置存储器件到FPGA的配置信息的加载。 篡改检测系统向FPGA提供篡改信号,其中当FPGA接收到篡改信号时,将配置数据替换为休眠数据。

    System and method for converting graphical call flows into finite state machines
    10.
    发明授权
    System and method for converting graphical call flows into finite state machines 有权
    将图形呼叫流转换为有限状态机的系统和方法

    公开(公告)号:US07945903B1

    公开(公告)日:2011-05-17

    申请号:US10826062

    申请日:2004-04-16

    IPC分类号: G06F9/45 G06F9/44

    CPC分类号: G06F17/28 G06F8/35 G06F9/4498

    摘要: A method, system and module for automatically converting a call flow into a state-based representation are disclosed. The method comprises walking a call flow and converting each page of the call flow into a rule of a higher level representation of the call flow, augmenting the higher level representation with terminal symbols representing state variable assignments and comparisons associated with decision and computation shapes in the call flow and converting the higher level representation into a state-based representation.

    摘要翻译: 公开了一种用于将呼叫流自动转换为基于状态的表示的方法,系统和模块。 该方法包括步行呼叫流并将呼叫流的每一页转换成呼叫流程的较高级别表示的规则,用表示状态变量分配的终端符号和与决策和计算形状相关联的比较来增加更高级别表示 调用流程并将较高级别的表示转换为基于状态的表示。