公开(公告)号：US5497456A

公开(公告)日：1996-03-05

申请号：US404136

申请日：1995-03-13

申请人： James W. Alexander ,  Elliot Garbus ,  Lionel S. Smith, Jr. ,  Douglas D. Yoder

发明人： James W. Alexander ,  Elliot Garbus ,  Lionel S. Smith, Jr. ,  Douglas D. Yoder

IPC分类号： G06F11/26 ,  G06F11/36 ,  G06F11/34

CPC分类号： G06F11/261 ,  G06F11/3656

摘要： A micro processor emulator in which a set of core micro processor registers are the communication interface between an external system and a core-ported memory. The registers are connected to a serial scan port for transfer of information between a halted emulation environment and the external system. The serial port includes a command register that receives a jump address to initiate execution of a software monitor. Two special bits are provided in the command register, one that indicates a break, and one that indicates a Fast Break GO. This provides a break mechanism for a micro processor chip which does not have a dedicated memory bus. This break mechanism is the mechanism by which a halt or an asynchronous break is effected. After a fast break, the Fast Break GO mechanism does the action described by one command, and then immediately goes back to emulation without any external processor intervention.

摘要翻译： 一种微处理器仿真器，其中一组核心微处理器寄存器是外部系统和核心端口存储器之间的通信接口。 寄存器连接到串行扫描端口，用于在暂停的仿真环境和外部系统之间传输信息。 串行端口包括一个命令寄存器，它接收跳转地址以启动软件监视器的执行。 在命令寄存器中提供两个特殊位，一个表示一个中断，一个表示快速跳转GO。 这为不具有专用存储器总线的微处理器芯片提供了中断机制。 这种断开机制是实现停止或异步中断的机制。 快速中断后，快速断点GO机制执行一个命令描述的动作，然后立即返回仿真，无需任何外部处理器干预。