System for processing VLIW words containing variable length instructions having embedded instruction length identifiers
    1.
    发明授权
    System for processing VLIW words containing variable length instructions having embedded instruction length identifiers 有权
    用于处理包含具有嵌入指令长度标识符的可变长度指令的VLIW字的系统

    公开(公告)号:US07302552B2

    公开(公告)日:2007-11-27

    申请号:US10963722

    申请日:2004-10-14

    IPC分类号: G06F9/30

    摘要: A processor is described including a plurality of data path elements which independently perform in parallel different data processing operations. Program instructions are provided which are decoded to generate control signals for controlling the data path elements. Multiple instruction sets are supported with the same data processing operation to be performed by the same data path element being differently encoded within different instructions of different instruction sets. This enables code compaction when little parallelism may be achieved and full parallelism to be specified when this is possible.

    摘要翻译: 描述了包括独立地并行执行不同数据处理操作的多个数据路径元件的处理器。 提供了被编码的程序指令,以产生用于控制数据路径元件的控制信号。 支持相同数据处理操作的多个指令集,该数据处理操作将由不同指令集的不同指令内的相同数据路径元素进行不同编码。 这可以实现代码压缩,当可以实现很少的并行性并且在可能时指定完全并行性。

    Program instruction compression
    2.
    发明申请
    Program instruction compression 有权
    程序指令压缩

    公开(公告)号:US20050257028A1

    公开(公告)日:2005-11-17

    申请号:US10963722

    申请日:2004-10-14

    摘要: A processor is described including a plurality of data path elements 2, 4, 6, 8 which independently perform in parallel different data processing operations. Program instructions are provided which are decoded to generate control signals for controlling the data path elements. Multiple instruction sets are supported with the same data processing operation to be performed by the same data path element being differently encoded within different instructions of different instruction sets. This enables code compaction when little parallelism may be achieved and full parallelism to be specified when this is possible.

    摘要翻译: 描述了处理器,其包括独立地并行执行不同数据处理操作的多个数据路径元件2,4,6,8。 提供了被编码的程序指令,以产生用于控制数据路径元件的控制信号。 支持相同数据处理操作的多个指令集,该数据处理操作将由不同指令集的不同指令内的相同数据路径元素进行不同编码。 这可以实现代码压缩,当可以实现很少的并行性并且在可能时指定完全并行性。

    System and method for compiling a computer program
    3.
    发明申请
    System and method for compiling a computer program 有权
    用于编译计算机程序的系统和方法

    公开(公告)号:US20070079297A1

    公开(公告)日:2007-04-05

    申请号:US11240798

    申请日:2005-10-03

    IPC分类号: G06F9/45

    CPC分类号: G06F8/443

    摘要: A system and method for compiling a computer program, and software for performing such compilation, are provided, the compilation process determining where to store the computer program in memory for subsequent retrieval by a data processing apparatus that is to execute the computer program. The method can be used to compile a computer program for execution on the data processing apparatus having memory comprising a plurality of memory sections, each memory section having a record associated therewith identifying one or more access properties associated with that memory section. The method comprises the steps of: a) performing a compilation in order to generate an initial mapping of each code portion of the program in the memory; b) evaluating a cost function to generate a cost value associated with the initial mapping; c) if the cost value does not satisfy a threshold cost value, re-performing the compilation having regard to the record of each memory section in order to generate a modified mapping; d) re-evaluating the cost function to generate a revised cost value associated with the modified mapping; e) iteratively repeating steps (c) and (d) until a predetermined condition is met; and f) outputting the mapping whose associated cost value most closely satisfied the threshold cost value. Such an approach enables a reduction in the power consumption resulting from memory accesses, whilst also reducing local memory requirements. Further, it reduces the risk that the total size and complexity of the computer program will be strongly constrained by the given local program memory size without the need to resort to more expensive techniques such as caches and/or modular programming techniques.

    摘要翻译: 提供了一种用于编译计算机程序的系统和方法以及用于执行这种编译的软件,编译过程确定将计算机程序存储在存储器中以便随后通过执行计算机程序的数据处理装置进行检索。 该方法可以用于编译计算机程序以在具有包括多个存储器部分的存储器的数据处理装置上执行,每个存储器部分具有与其相关联的记录,其中识别与该存储器部分相关联的一个或多个访问属性。 该方法包括以下步骤:a)执行编译以便产生存储器中程序的每个代码部分的初始映射; b)评估成本函数以生成与初始映射相关联的成本值; c)如果成本值不满足阈值成本值,则考虑到每个存储器部分的记录重新执行编译以便生成修改的映射; d)重新评估成本函数以产生与修改的映射相关联的修正成本值; e)迭代地重复步骤(c)和(d),直到满足预定条件; 以及f)输出其关联成本值最接近于阈值成本值的映射。 这种方法使得能够减少由存储器访问引起的功耗,同时还减少本地存储器要求。 此外,它降低了计算机程序的总体大小和复杂性将被给定的本地程序存储器大小强烈地限制的风险,而不需要采用诸如高速缓存和/或模块化编程技术的更昂贵的技术。

    Generating instruction sets for compacting long instructions
    4.
    发明申请
    Generating instruction sets for compacting long instructions 有权
    生成用于压缩长指令的指令集

    公开(公告)号:US20070055850A1

    公开(公告)日:2007-03-08

    申请号:US11220911

    申请日:2005-09-08

    IPC分类号: G06F9/44

    CPC分类号: G06F9/3853 G06F9/30145

    摘要: A method of generating at least one instruction set from a plurality of program instructions, said plurality of program instructions comprising a plurality of instruction fields each of said instruction fields operable on decoding to generate control signals for transmission by individual command buses, said method comprising the steps of: determining which combination of command buses each instruction is operable to communicate control signals to and forming a cluster of instructions from instructions that communicate control signals to a same combination of command buses; developing at least one instruction set for at least some of said instruction clusters, said at least one instruction set having fewer bits than said program instruction; specifying a number of identification bits within said at least one instruction set operable to identify said instruction set; determining a number of bits required for each instruction field within said at least one instruction set to specify all possible control signals that can be sent by said at least one instruction set along a respective one of said command buses and reallocating any bits that are allocated to said instruction field that are in excess of said determined required number to said identification bits, such that an increased number of different instruction sets can be identified by said identification bits.

    摘要翻译: 一种从多个程序指令生成至少一个指令集的方法,所述多个程序指令包括多个指令字段,每个所述指令字段可在解码时操作,以产生用于各个指令总线传输的控制信号,所述方法包括: 步骤:确定命令总线的每个指令的组合是可操作的,以将控制信号传送到指令集群并且从指令传达控制信号到指令总线的相同组合; 为至少一些所述指令集群开发至少一个指令集,所述至少一个指令集具有比所述程序指令少的位; 指定所述至少一个指令集内的识别位的数目,用于​​识别所述指令集; 确定所述至少一个指令集中的每个指令字段所需的位数,以指定所有可能的控制信号,所述可能的控制信号可以由所述至少一个指令集沿着所述命令总线的相应一个发送,并重新分配任何被分配给 所述指令字段超过所述确定的所需数量到所述识别位,使得可以通过所述标识位来识别增加的不同指令集的数量。