System and method for accounting for time that a packet spends in transit through a transparent clock
    1.
    发明授权
    System and method for accounting for time that a packet spends in transit through a transparent clock 有权
    用于计算数据包通过透明时钟传输的时间的系统和方法

    公开(公告)号:US09252903B2

    公开(公告)日:2016-02-02

    申请号:US13279043

    申请日:2011-10-21

    IPC分类号: H04J3/06 H04L12/26

    摘要: Despite a recent revision, IEEE 1588™-2008 does not provide a complete implementation for PTP (precision time protocol) that accounts for variable delays introduced by network components. According to a broad aspect, the present disclosure provides implementations that account for variable delays introduced by network components. Therefore, the amount of time that a packet spends in transit through a transparent clock can be accounted for. According to another broad aspect, there is provided a master-slave mode that allows a transparent clock to function as a master or a slave to another clock.

    摘要翻译: 尽管最近进行了修订,但IEEE 1588™-2008并没有为PTP(精确时间协议)提供一个完整的实现,可以解决由网络组件引入的可变延迟。 根据广泛的方面,本公开提供了解决由网络组件引入的可变延迟的实现。 因此,可以考虑数据包通过透明时钟传输的时间量。 根据另一个广泛的方面,提供了一种主从模式,其允许透明时钟用作另一个时钟的主器件或从器件。

    SYSTEM AND METHOD FOR ACCOUNTING FOR TIME THAT A PACKET SPENDS IN TRANSIT THROUGH A TRANSPARENT CLOCK
    2.
    发明申请
    SYSTEM AND METHOD FOR ACCOUNTING FOR TIME THAT A PACKET SPENDS IN TRANSIT THROUGH A TRANSPARENT CLOCK 有权
    用于通过透明时钟传输分组的时间的会计系统和方法

    公开(公告)号:US20130100832A1

    公开(公告)日:2013-04-25

    申请号:US13279043

    申请日:2011-10-21

    IPC分类号: H04L12/26

    摘要: Despite a recent revision, IEEE 1588™-2008 does not provide a complete implementation for PTP (precision time protocol) that accounts for variable delays introduced by network components. According to a broad aspect, the present disclosure provides implementations that account for variable delays introduced by network components. Therefore, the amount of time that a packet spends in transit through a transparent clock can be accounted for. According to another broad aspect, there is provided a master-slave mode that allows a transparent clock to function as a master or a slave to another clock.

    摘要翻译: 尽管最近进行了修订,但是IEEE 1588(TM)-2008并没有为PTP(精确时间协议)提供一个完整的实现,可以解决由网络组件引入的可变延迟。 根据广泛的方面,本公开提供了解决由网络组件引入的可变延迟的实现。 因此,可以考虑数据包通过透明时钟传输的时间量。 根据另一个广泛的方面,提供了一种主从模式,其允许透明时钟用作另一个时钟的主器件或从器件。

    SIGNAL FORMAT CONVERSION APPARATUS AND METHODS
    3.
    发明申请
    SIGNAL FORMAT CONVERSION APPARATUS AND METHODS 有权
    信号格式转换装置和方法

    公开(公告)号:US20120269511A1

    公开(公告)日:2012-10-25

    申请号:US13091908

    申请日:2011-04-21

    IPC分类号: H04J14/00

    CPC分类号: H04J3/1664 H04J2203/0089

    摘要: Signal format conversion apparatus and methods involve converting data signals between a first signal format associated with a first reference clock rate and a second signal format that is different from the first signal format and is associated with a second reference clock rate different from the first reference clock rate. A period of the second signal format is changed to match a period of a third signal format by controlling a synchronized second reference clock rate that is applied in converting data signals between the first signal format and the second signal format. The synchronized second reference clock rate is different from the second reference clock rate and is synchronized with a third reference clock rate. The third reference clock rate is associated with the third signal format. Such synchronization simplifies conversion of signals between the second and third signal formats.

    摘要翻译: 信号格式转换装置和方法包括在与第一参考时钟速率相关联的第一信号格式和不同于第一信号格式的第二信号格式之间转换数据信号,并且与不同于第一参考时钟的第二参考时钟速率相关联 率。 通过控制在第一信号格式和第二信号格式之间转换数据信号中应用的同步的第二参考时钟速率来改变第二信号格式的周期以匹配第三信号格式的周期。 同步的第二参考时钟速率与第二参考时钟速率不同,并且与第三参考时钟速率同步。 第三参考时钟速率与第三信号格式相关联。 这种同步简化了第二和第三信号格式之间信号的转换。

    Signal format conversion apparatus and methods
    5.
    发明授权
    Signal format conversion apparatus and methods 有权
    信号格式转换装置及方法

    公开(公告)号:US08494363B2

    公开(公告)日:2013-07-23

    申请号:US13091908

    申请日:2011-04-21

    IPC分类号: H04B10/00

    CPC分类号: H04J3/1664 H04J2203/0089

    摘要: Signal format conversion apparatus and methods involve converting data signals between a first signal format associated with a first reference clock rate and a second signal format that is different from the first signal format and is associated with a second reference clock rate different from the first reference clock rate. A period of the second signal format is changed to match a period of a third signal format by controlling a synchronized second reference clock rate that is applied in converting data signals between the first signal format and the second signal format. The synchronized second reference clock rate is different from the second reference clock rate and is synchronized with a third reference clock rate. The third reference clock rate is associated with the third signal format. Such synchronization simplifies conversion of signals between the second and third signal formats.

    摘要翻译: 信号格式转换装置和方法包括在与第一参考时钟速率相关联的第一信号格式和不同于第一信号格式的第二信号格式之间转换数据信号,并且与不同于第一参考时钟的第二参考时钟速率相关联 率。 通过控制在第一信号格式和第二信号格式之间转换数据信号中应用的同步的第二参考时钟速率来改变第二信号格式的周期以匹配第三信号格式的周期。 同步的第二参考时钟速率与第二参考时钟速率不同,并且与第三参考时钟速率同步。 第三参考时钟速率与第三信号格式相关联。 这种同步简化了第二和第三信号格式之间信号的转换。