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1.发明授权Arrangement for converting virtual addresses into physical addresses in a data processing system 失效在数据处理系统中将虚拟地址转换为物理地址的布置
公开(公告)号：US4279014A
公开(公告)日：1981-07-14
申请号：US933546
申请日：1978-08-14
CPC分类号： G06F12/0292 , G06F12/1018
摘要： An arrangement for dynamically translating virtual address into absolute or physical addresses of items of data. Each virtual address includes a segment table number, a segment table entry, and a segment page number. Segment descriptors are stored in a central memory. The address of a particular segment descriptor may be calculated from the segment table number and the segment table entry. From the segment descriptor, a unique identification termed a logic page number may be calculated. The logic page number permits pseudo-associative access to a table containing a number of entries proportional to the number of physical pages of the main memory, allowing the physical address to be determined.
摘要翻译： 用于将虚拟地址动态地转换成数据项的绝对或物理地址的布置。 每个虚拟地址包括段表号，段表条目和段页号。 段描述符存储在中央存储器中。 可以从段表号和段表项计算特定段描述符的地址。 可以从段描述符计算称为逻辑页码的唯一标识。 逻辑页码允许对包含与主存储器的物理页数成比例的多个条目的表的伪相关访问，从而允许确定物理地址。
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2.发明授权Apparatus for and method of addressing data elements in a table having several entries 失效在具有多个条目的表中寻址数据元素的装置和方法
公开(公告)号：US4456953A
公开(公告)日：1984-06-26
申请号：US219387
申请日：1980-12-22
CPC分类号： G06F12/04
摘要： A data byte element E located at position d in entry i of memory section M.sub.a having reference entry TR is addressed. Memory section M.sub.a is one section of a table in a data processory memory, such that each of the entries in section M.sub.a has a predetermined number (t) of elements E. Signals having values related to the values of i, t and TR of several memory sections are stored in a storage device and read out when the storage device is addressed. A signal related to the value of d is also derived as a result of read-out from the storage device. The signals having values related to the values of i, t, TR and d are combined to derive an addressing signal for element E in memory section M.sub.a of the table of the data processing memory. An address circuit for the data processing memory responds to the addressing signal to addressing element E in memory section M.sub.a.
摘要翻译： 位于具有参考条目TR的存储器部分Ma的条目i中的位置d处的数据字节元素E被寻址。 存储器部分Ma是数据处理存储器中的表的一部分，使得部分Ma中的每个条目具有预定数量（t）的元素E.具有与几个的i，t和TR的值相关的值的信号 存储器部分存储在存储设备中，并且当存储设备被寻址时被读出。 与d值相关的信号也是从存储装置读出的结果导出的。 具有与i，t，TR和d的值相关的值的信号被组合以导出数据处理存储器的表的存储器部分Ma中的元素E的寻址信号。 用于数据处理存储器的地址电路响应寻址信号到存储器部分Ma中的寻址元件E.
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