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1.发明授权Apparatus for controlling microinstructions stored in a data processing unit memory 失效用于控制存储在数据处理单元存储器中的微指令的装置
公开(公告)号：US4511983A
公开(公告)日：1985-04-16
申请号：US219388
申请日：1980-12-22
CPC分类号： G06F9/261
摘要： A controller for microinstructions grouped into microprogram segments, each of which defines a base of a microprogram segment which is to be executed, includes a bank of addressable base registers. Each register in the bank stores an indication of a base in the memory. Registers in the bank are addressed so that the addressed register derives a signal indicative of the base address. Included are an address register for the memory and an output register for microinstructions read from the memory. The address and output registers respectively have outputs and inputs coupled to an address input and a read output of the memory. An adder has inputs responsive to the base indicating signal of the addressed register and to an output of the memory output register. The adder has an output coupled to an input of the address register. The output of the memory output register is coupled to an input of the means for addressing registers in the register bank to control which register of the base register bank is addressed.
摘要翻译： 用于微指令的控制器，分组为微程序段，每个微指令段定义要执行的微程序段的基础，包括一组可寻址的基址寄存器。 银行中的每个寄存器存储存储器中基地的指示。 存储器中的寄存器被寻址，使得寻址的寄存器导出指示基地址的信号。 包括存储器的地址寄存器和从存储器读取的微指令的输出寄存器。 地址和输出寄存器分别具有耦合到存储器的地址输入和读输出的输出和输入。 加法器具有响应于所寻址的寄存器的基准指示信号和存储器输出寄存器的输出的输入。 加法器具有耦合到地址寄存器的输入的输出。 存储器输出寄存器的输出耦合到寄存器组中用于寻址寄存器的装置的输入，以控制基址寄存器组的哪个寄存器被寻址。
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2.发明授权Arrangement for converting virtual addresses into physical addresses in a data processing system 失效在数据处理系统中将虚拟地址转换为物理地址的布置
公开(公告)号：US4279014A
公开(公告)日：1981-07-14
申请号：US933546
申请日：1978-08-14
CPC分类号： G06F12/0292 , G06F12/1018
摘要： An arrangement for dynamically translating virtual address into absolute or physical addresses of items of data. Each virtual address includes a segment table number, a segment table entry, and a segment page number. Segment descriptors are stored in a central memory. The address of a particular segment descriptor may be calculated from the segment table number and the segment table entry. From the segment descriptor, a unique identification termed a logic page number may be calculated. The logic page number permits pseudo-associative access to a table containing a number of entries proportional to the number of physical pages of the main memory, allowing the physical address to be determined.
摘要翻译： 用于将虚拟地址动态地转换成数据项的绝对或物理地址的布置。 每个虚拟地址包括段表号，段表条目和段页号。 段描述符存储在中央存储器中。 可以从段表号和段表项计算特定段描述符的地址。 可以从段描述符计算称为逻辑页码的唯一标识。 逻辑页码允许对包含与主存储器的物理页数成比例的多个条目的表的伪相关访问，从而允许确定物理地址。
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