公开(公告)号：US20090087961A1

公开(公告)日：2009-04-02

申请号：US12236980

申请日：2008-09-24

申请人： Jean-Michel HARTMANN ,  Laurent VANDROUX

发明人： Jean-Michel HARTMANN ,  Laurent VANDROUX

IPC分类号： H01L21/02

CPC分类号： H01L21/2007 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262

摘要： The invention relates to a process for fabricating a semiconductor structure, which comprises: a step a) of providing an Si substrate having a front face and a rear face; and a step b) that includes the epitaxial deposition, on the front face of the Si substrate, of a thick Ge layer, of an SiGe virtual substrate or of a multilayer comprising at least one thick Ge layer or at least one SiGe virtual substrate, and which is characterized in that it further includes the deposition, on the rear face of the Si substrate, of a layer or a plurality of layers generating, on this rear face, flexural stresses that compensate for the flexural stresses that are exerted on the front face of said substrate after step b).The invention also relates to a process for fabricating semiconductor-on-insulator substrates implementing the above process.Applications in microelectronics and optoelectronics.

摘要翻译： 本发明涉及一种制造半导体结构的方法，包括：a）提供具有正面和背面的Si衬底; 以及步骤b），其包括在Si衬底的前表面上的厚Ge层，SiGe虚拟衬底或包括至少一个厚Ge层或至少一个SiGe虚拟衬底的多层的外延沉积， 并且其特征在于，其还包括在Si衬底的后表面上沉积一层或多层，在该后表面上产生补偿施加在前面上的弯曲应力的弯曲应力 在步骤b）之后的所述衬底的表面。 本发明还涉及一种制造实现上述工艺的绝缘体上半导体衬底的方法。 微电子学与光电子学应用。

公开(公告)号：US20120108019A1

公开(公告)日：2012-05-03

申请号：US13280694

申请日：2011-10-25

申请人： Jean-Michel HARTMANN

发明人： Jean-Michel HARTMANN

IPC分类号： H01L21/336

CPC分类号： H01L21/8258 ,  H01L21/76283 ,  H01L21/84 ,  H01L29/165

摘要： A layer of second semiconductor material is deposited on the layer of first semiconductor material of a substrate. Two active areas are then defined by means of selective elimination of the first and second semiconductor materials. One of the two active areas is then covered by a protective material. The layer of second semiconductor material is then eliminated by means of selective elimination of material. A first active area comprising a main surface made from a first semiconductor material, and a second active area comprising a main surface made from second semiconductor material are thus obtained.

摘要翻译： 在衬底的第一半导体材料层上沉积一层第二半导体材料。 然后通过选择性地消除第一和第二半导体材料来限定两个有效区域。 然后，两个活动区域之一被保护材料覆盖。 然后通过选择性消除材料来消除第二半导体材料层。 由此获得包括由第一半导体材料制成的主表面的第一有源区和包括由第二半导体材料制成的主表面的第二有源区。