Apparatus and method for multiplexing bi-directional data onto a low pin count bus between a host CPU and co-processor
    1.
    发明授权
    Apparatus and method for multiplexing bi-directional data onto a low pin count bus between a host CPU and co-processor 有权
    将双向数据复用到主机CPU和协处理器之间的低引脚数总线上的装置和方法

    公开(公告)号:US06434650B1

    公开(公告)日:2002-08-13

    申请号:US09176571

    申请日:1998-10-21

    IPC分类号: G06F1300

    CPC分类号: G06F13/4291

    摘要: An apparatus and method for communication between a host CPU and a security co-processor are disclosed, in which a bus having a bi-directional data and command bus, a bi-directional control line, and a uni-directional clock line, is coupled to the CPU and to the co-processor. The bus supports data transfer between the CPU and the co-processor, including read operations and write operations, where each such operation includes a command phase, a data transfer phase, and an error check phase. The CPU and the co-processor have a dual master slave mode wherein either may be master of the bus, while the other is the slave. The bi-directional data and command bus carries command information from the master to the slave 10 during the command phase, and carries data from the master to the slave during the data transfer phase for a write operation, and from the slave to the master for a read operation. The bi-directional control line specifies the start and end of each transfer. The uni-directional clock line synchronously clocks both the bi-directional data and command bus and the bi-directional control line. Data is transferred a packet at a time; each packet consists of an octet of data, which 15 is transferred during 8 clocks. Flow control need only be applied once for each packet of data, and thus, only once per 8 clocks.

    摘要翻译: 公开了一种用于主机CPU和安全协处理器之间通信的装置和方法,其中具有双向数据和命令总线,双向控制线和单向时钟线的总线被耦合 到CPU和协处理器。 总线支持CPU和协处理器之间的数据传输,包括读操作和写操作,其中每个这样的操作包括命令阶段,数据传输阶段和错误校验阶段。 CPU和协处理器具有双主从模式,其中也可以是总线的主机,而另一个是从机。 双向数据和命令总线在命令阶段将命令信息从主机传送到从机10,并在写操作的数据传输阶段将数据从主机传送到从机,从从机到主机, 一个读操作。 双向控制线指定每次传输的开始和结束。 单向时钟线同时对双向数据和命令总线以及双向控制线进行时钟同步。 数据一次传送一个数据包; 每个数据包由八位字节的数据组成,在8个时钟周期内传输15个数据。 流量控制只需对每个数据包应用一次,因此每8个时钟只需一次。