Stylus and antenna thereof
    1.
    发明授权
    Stylus and antenna thereof 有权
    触针及其天线

    公开(公告)号:US09312600B2

    公开(公告)日:2016-04-12

    申请号:US13775262

    申请日:2013-02-25

    摘要: A stylus includes a conductive rod, a circuit board, and an antenna. The conductive rod has a first opening. The circuit board is disposed in the conductive rod and includes a ground portion, wherein the conductive rod is electrically connected to the ground portion. The antenna includes a radiating portion and a feeding portion. The feeding portion is electrically connected to the circuit board and extends to the outside of the conductive rod via the first opening. The radiating portion is disposed at the outside of the conductive rod and is electrically connected to the feeding portion.

    摘要翻译: 触针包括导电棒,电路板和天线。 导电棒具有第一开口。 电路板设置在导电棒中并且包括接地部分,其中导电棒电连接到接地部分。 天线包括辐射部分和馈送部分。 馈电部分电连接到电路板,并经由第一开口延伸到导电棒的外部。 辐射部分设置在导电棒的外侧并与馈电部分电连接。

    STYLUS
    2.
    发明申请
    STYLUS 有权

    公开(公告)号:US20130234998A1

    公开(公告)日:2013-09-12

    申请号:US13775262

    申请日:2013-02-25

    IPC分类号: H01Q1/52 G06F3/0354

    摘要: A stylus includes a conductive rod, a circuit board, and an antenna. The conductive rod has a first opening. The circuit board is disposed in the conductive rod and includes a ground portion, wherein the conductive rod is electrically connected to the ground portion. The antenna includes a radiating portion and a feeding portion. The feeding portion is electrically connected to the circuit board and extends to the outside of the conductive rod via the first opening. The radiating portion is disposed at the outside of the conductive rod and is electrically connected to the feeding portion.

    摘要翻译: 触针包括导电棒,电路板和天线。 导电棒具有第一开口。 电路板设置在导电棒中并且包括接地部分,其中导电棒电连接到接地部分。 天线包括辐射部分和馈送部分。 馈电部分电连接到电路板,并经由第一开口延伸到导电棒的外部。 辐射部分设置在导电棒的外侧并与馈电部分电连接。

    Antenna matching circuit control device
    3.
    发明授权
    Antenna matching circuit control device 失效
    天线匹配电路控制装置

    公开(公告)号:US08570236B2

    公开(公告)日:2013-10-29

    申请号:US13236033

    申请日:2011-09-19

    IPC分类号: H01Q1/50

    CPC分类号: H01Q1/50 H01Q1/24 H03H7/38

    摘要: The antenna matching circuit control device with an antenna body includes a sensing module, a processing module, a power adjusting module and a frequency adjusting module. The sensing module senses an object that approaches the antenna body and outputs a sensing signal accordingly. The processing module is coupled to the sensing module and outputs a first control signal and a second control signal according to the sensing signal. The power adjusting module is coupled to the processing module and controls a power amplifier to couple with one of a plurality of first matching circuits according to the first control signal. The frequency adjusting module is coupled to the antenna body and the power adjusting module. The frequency adjusting module controls one of a plurality of second matching circuits to couple with one of the first matching circuits according to the second control signal.

    摘要翻译: 具有天线体的天线匹配电路控制装置包括感测模块,处理模块,功率调整模块和频率调整模块。 感测模块​​感测接近天线体的物体,并相应地输出感测信号。 处理模块耦合到感测模块,并根据感测信号输出第一控制信号和第二控制信号。 功率调节模块耦合到处理模块,并根据第一控制信号控制功率放大器与多个第一匹配电路之一耦合。 频率调节模块耦合到天线体和功率调节模块。 频率调整模块根据第二控制信号控制多个第二匹配电路中的一个与第一匹配电路之一耦合。

    ANTENNA MATCHING CIRCUIT CONTROL DEVICE
    4.
    发明申请
    ANTENNA MATCHING CIRCUIT CONTROL DEVICE 失效
    天线匹配电路控制装置

    公开(公告)号:US20120075159A1

    公开(公告)日:2012-03-29

    申请号:US13236033

    申请日:2011-09-19

    IPC分类号: H01Q1/50

    CPC分类号: H01Q1/50 H01Q1/24 H03H7/38

    摘要: The antenna matching circuit control device with an antenna body includes a sensing module, a processing module, a power adjusting module and a frequency adjusting module. The sensing module senses an object that approaches the antenna body and outputs a sensing signal accordingly. The processing module is coupled to the sensing module and outputs a first control signal and a second control signal according to the sensing signal. The power adjusting module is coupled to the processing module and controls a power amplifier to couple with one of a plurality of first matching circuits according to the first control signal. The frequency adjusting module is coupled to the antenna body and the power adjusting module. The frequency adjusting module controls one of a plurality of second matching circuits to couple with one of the first matching circuits according to the second control signal.

    摘要翻译: 具有天线体的天线匹配电路控制装置包括感测模块,处理模块,功率调整模块和频率调整模块。 感测模块​​感测接近天线体的物体,并相应地输出感测信号。 处理模块耦合到感测模块,并根据感测信号输出第一控制信号和第二控制信号。 功率调节模块耦合到处理模块,并根据第一控制信号控制功率放大器与多个第一匹配电路之一耦合。 频率调节模块耦合到天线体和功率调节模块。 频率调整模块根据第二控制信号控制多个第二匹配电路中的一个与第一匹配电路之一耦合。

    System for Simulating Processor Power Consumption and Method of the Same
    5.
    发明申请
    System for Simulating Processor Power Consumption and Method of the Same 审中-公开
    用于模拟处理器功耗的系统及其方法

    公开(公告)号:US20110218791A1

    公开(公告)日:2011-09-08

    申请号:US12716446

    申请日:2010-03-03

    IPC分类号: G06G7/62

    CPC分类号: G06G7/62

    摘要: The present invention provides a method for simulating processor power consumption, the method comprises: simulating a simulated processor; utilizing a power analysis model to analyze the simulated processor's execution of at least one fragment of a program, for generating power analysis of a plurality of basic blocks of the at least one fragment; computing at least one power correction factor between the plurality of basic block; utilizing a processing apparatus to generate a simulation model with power annotation based on the power analysis and the at least one power correction factor; and predicting power consumption of the simulated processor based on the simulation model with power annotation.

    摘要翻译: 本发明提供了一种用于模拟处理器功耗的方法,所述方法包括:模拟模拟处理器; 利用功率分析模型来分析所述模拟处理器对程序的至少一个片段的执行,以产生所述至少一个片段的多个基本块的功率分析; 计算所述多个基本块之间的至少一个功率校正因子; 利用处理装置基于功率分析和至少一个功率校正因子来生成具有功率注释的仿真模型; 并基于具有功率注释的仿真模型预测模拟处理器的功耗。

    Method and device for multi-core instruction-set simulation
    6.
    发明申请
    Method and device for multi-core instruction-set simulation 有权
    多核指令集仿真的方法和装置

    公开(公告)号:US20100269103A1

    公开(公告)日:2010-10-21

    申请号:US12588324

    申请日:2009-10-13

    IPC分类号: G06F9/45

    摘要: The present invention discloses a method for multi-core instruction-set simulation. The proposed method identifies the shared data segment and the dependency relationship between the different cores and thus effectively reduces the number of sync points and lowers the synchronization overhead, allowing multi-core instruction-set simulation to be performed more rapidly while ensuring that the simulation results are accurate. In addition, the present invention also discloses a device for multi-core instruction-set simulation.

    摘要翻译: 本发明公开了一种多核指令集仿真方法。 所提出的方法识别共享数据段和不同核心之间的依赖关系,从而有效减少同步点数量,降低同步开销,从而允许更多地执行多核指令集仿真,同时确保仿真结果 是准确的 此外,本发明还公开了一种用于多核指令集仿真的装置。

    Method and device for multi-core instruction-set simulation
    7.
    发明授权
    Method and device for multi-core instruction-set simulation 有权
    多核指令集仿真的方法和装置

    公开(公告)号:US08352924B2

    公开(公告)日:2013-01-08

    申请号:US12588324

    申请日:2009-10-13

    IPC分类号: G06F9/45

    摘要: The present invention discloses a method for multi-core instruction-set simulation. The proposed method identifies the shared data segment and the dependency relationship between the different cores and thus effectively reduces the number of sync points and lowers the synchronization overhead, allowing multi-core instruction-set simulation to be performed more rapidly while ensuring that the simulation results are accurate. In addition, the present invention also discloses a device for multi-core instruction-set simulation.

    摘要翻译: 本发明公开了一种多核指令集仿真方法。 所提出的方法识别共享数据段和不同核心之间的依赖关系,从而有效减少同步点数量,降低同步开销,从而允许更多地执行多核指令集仿真,同时确保仿真结果 是准确的 此外,本发明还公开了一种用于多核指令集仿真的装置。

    DEADLOCK FREE SYNCHRONIZATION SYNTHESIZER FOR MUST-HAPPEN-BEFORE RELATIONS IN PARALLEL PROGRAMS AND METHOD THEREOF
    8.
    发明申请
    DEADLOCK FREE SYNCHRONIZATION SYNTHESIZER FOR MUST-HAPPEN-BEFORE RELATIONS IN PARALLEL PROGRAMS AND METHOD THEREOF 审中-公开
    用于在并行程序之间的紧密关系之前无需同步的同步合成器及其方法

    公开(公告)号:US20130179864A1

    公开(公告)日:2013-07-11

    申请号:US13455659

    申请日:2012-04-25

    IPC分类号: G06F9/44

    CPC分类号: G06F9/524

    摘要: A deadlock free synchronization synthesizer for must-happen-before relations in at least two parallel programs or at least two threads each having multiple code segments has an input device to specify a synchronization point to involving code segments for each parallel program or thread and must-happen-before relations to the synchronization point, an analyzing module connected to the input device to detect existence of a deadlock in the parallel programs by using the must-happen-before relations, and a synthesizing module connected to the analyzing module to synthesize a practice code corresponding to the parallel programs if the deadlock existence detection is negative.

    摘要翻译: 用于至少两个并行程序中的必须发生关系的无死锁同步合成器或至少两个具有多个代码段的线程具有用于指定同步点以涉及每个并行程序或线程的代码段的输入设备, 发生在与同步点之间的关系之前,连接到输入设备的分析模块通过使用必须事先关系来检测并行程序中的死锁的存在,以及连接到分析模块以合成实践的合成模块 如果死锁存在检测为负,则对应于并行程序的代码。

    High-parallelism synchronization approach for multi-core instruction-set simulation
    9.
    发明授权
    High-parallelism synchronization approach for multi-core instruction-set simulation 有权
    用于多核指令集仿真的高并行同步方法

    公开(公告)号:US08423343B2

    公开(公告)日:2013-04-16

    申请号:US13011942

    申请日:2011-01-24

    摘要: The present invention discloses a high-parallelism synchronization method for multi-core instruction-set simulation. The proposed method utilizes a new distributed scheduling mechanism for a parallel compiled MCISS. The proposed method can enhance the parallelism of the MCISS so that the computing power of a multi-core host machine can be effectively utilized. The distributed scheduling with the present invention's prediction method significantly shortens the waiting time which an ISS spends on synchronization.

    摘要翻译: 本发明公开了一种用于多核指令集仿真的高并行同步方法。 所提出的方法利用并行编译的MCISS的新的分布式调度机制。 所提出的方法可以增强MCISS的并行性,从而可以有效利用多核主机的计算能力。 利用本发明的预测方法的分布式调度大大缩短了ISS花费在同步上的等待时间。

    High-Parallelism Synchronization Approach for Multi-Core Instruction-Set Simulation
    10.
    发明申请
    High-Parallelism Synchronization Approach for Multi-Core Instruction-Set Simulation 有权
    用于多核指令集仿真的高并行同步方法

    公开(公告)号:US20120191441A1

    公开(公告)日:2012-07-26

    申请号:US13011942

    申请日:2011-01-24

    IPC分类号: G06F9/455

    摘要: The present invention discloses a high-parallelism synchronization method for multi-core instruction-set simulation. The proposed method utilizes a new distributed scheduling mechanism for a parallel compiled MCISS. The proposed method can enhance the parallelism of the MCISS so that the computing power of a multi-core host machine can be effectively utilized. The distributed scheduling with the present invention's prediction method significantly shortens the waiting time which an ISS spends on synchronization

    摘要翻译: 本发明公开了一种用于多核指令集仿真的高并行同步方法。 所提出的方法利用并行编译的MCISS的新的分布式调度机制。 所提出的方法可以增强MCISS的并行性,从而可以有效利用多核主机的计算能力。 利用本发明的预测方法的分布式调度大大缩短了ISS花费在同步上的等待时间