公开(公告)号：US20110221002A1

公开(公告)日：2011-09-15

申请号：US13055553

申请日：2010-07-14

申请人： Jing Chen ,  Jiexin Luo ,  Qingqing Wu ,  Bingxu Ning ,  Zhongying Xue ,  Xiaolu Huang ,  Xi Wang

发明人： Jing Chen ,  Jiexin Luo ,  Qingqing Wu ,  Bingxu Ning ,  Zhongying Xue ,  Xiaolu Huang ,  Xi Wang

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/0266

摘要： The present invention discloses a MOS ESD protection device for SOI technology and a manufacturing method for the device. The MOS ESD protection device comprises: an epitaxial silicon layer grown on top of an SOI substrate; a first side-wall spacer disposed on both sides of the epitaxial silicon layer so as to isolate the ESD protection device from the intrinsic active structures; a source region and a drain region disposed respectively on two sides of the epitaxial silicon layer; a poly silicon gate and a gate dielectric formed on top of the epitaxial silicon layer; and a second side-wall spacer disposed on both sides of the poly silicon gate of . ESD leakage current passes down to the SOI substrate for protection. Because ESD protection device and intrinsic MOS transistor are located in the same plane, this fabrication process can be inserted in the current MOS process flow.

摘要翻译： 本发明公开了一种用于SOI技术的MOS ESD保护器件和该器件的制造方法。 MOS ESD保护器件包括：在SOI衬底的顶部上生长的外延硅层; 设置在所述外延硅层的两侧的第一侧壁间隔件，以将所述ESD保护装置与所述固有活性结构隔离; 分别设置在所述外延硅层的两侧的源极区域和漏极区域; 形成在外延硅层顶部的多晶硅栅极和栅极电介质; 以及设置在多晶硅栅极两侧的第二侧壁间隔物。 ESD泄漏电流通过SOI衬底进行保护。 由于ESD保护器件和本征MOS晶体管位于同一平面内，所以该制造工艺可以插入当前的MOS工艺流程中。