公开(公告)号：US20110193842A1

公开(公告)日：2011-08-11

申请号：US12703896

申请日：2010-02-11

申请人： Yu-Cheng Tsai ,  Kuo-Hsien Lee ,  Chao-Liang Lu ,  Jing-Tin Kuo

发明人： Yu-Cheng Tsai ,  Kuo-Hsien Lee ,  Chao-Liang Lu ,  Jing-Tin Kuo

IPC分类号： G09G3/36 ,  G09G5/00 ,  G02F1/1343

CPC分类号： G09G3/3607 ,  G09G3/3659 ,  G09G3/3677 ,  G09G2300/0809 ,  G09G2300/0814 ,  G09G2320/0219 ,  G09G2320/0233 ,  G09G2330/021

摘要： A liquid crystal display (LCD) and methods of driving same. In one embodiment, the LCD) includes a plurality of gate lines, {Gn}, spatially arranged along a row direction; a plurality of data lines, {Dm}, spatially arranged along a column direction perpendicular to the row direction, and a plurality of pixels, {Pn,m}, spatially arranged in the form of a matrix, where m=1, 2, . . . , M, n=1, 2, . . . , N, and M and N are positive integers. Each pixel Pn,m is defined between two neighboring gate lines Gn and Gn+1 and two neighboring data lines Dm and Dm+1, and comprises a first sub-pixel electrode, a second sub-pixel electrode, a first transistor having a gate electrically coupled to the gate line Gn+1, a source and a drain electrically coupled to the first sub-pixel electrode, a second transistor having a gate electrically coupled to the gate line Gn, a source electrically coupled to the source of the first transistor and a drain electrically coupled to the second sub-pixel electrode, and a third transistor having a gate electrically coupled to the gate line Gn+2, a source electrically coupled to one of the two neighboring data lines Dm and Dm+1 and a drain electrically coupled to the sources of the first and second transistors.

摘要翻译： 液晶显示器（LCD）及其驱动方法。 在一个实施例中，LCD）包括沿着行方向在空间上排列的多条栅极线{Gn} 沿垂直于行方向的列方向空间排列的多条数据线{Dm}，以矩阵形式空间排列的多个像素{Pn，m}，其中m = 1,2， 。 。 。 ，M，n = 1,2。 。 。 ，N和M和N是正整数。 每个像素Pn，m定义在两个相邻的栅极线Gn和Gn + 1以及两个相邻的数据线Dm和Dm + 1之间，并且包括第一子像素电极，第二子像素电极，具有栅极的第一晶体管 电耦合到栅极线Gn + 1，电耦合到第一子像素电极的源极和漏极，具有电耦合到栅极线Gn的栅极的第二晶体管，电耦合到第一晶体管的源极的源极 以及漏极，电耦合到第二子像素电极，以及第三晶体管，其具有电耦合到栅极线Gn + 2的栅极，电耦合到两个相邻数据线Dm和Dm + 1中的一个的源极和漏极 电耦合到第一和第二晶体管的源极。

公开(公告)号：US08411003B2

公开(公告)日：2013-04-02

申请号：US12703896

申请日：2010-02-11

申请人： Yu-Cheng Tsai ,  Kuo-Hsien Lee ,  Chao-Liang Lu ,  Jing-Tin Kuo

发明人： Yu-Cheng Tsai ,  Kuo-Hsien Lee ,  Chao-Liang Lu ,  Jing-Tin Kuo

IPC分类号： G09G3/36

CPC分类号： G09G3/3607 ,  G09G3/3659 ,  G09G3/3677 ,  G09G2300/0809 ,  G09G2300/0814 ,  G09G2320/0219 ,  G09G2320/0233 ,  G09G2330/021

摘要： A liquid crystal display (LCD) and methods of driving same. In one embodiment, the LCD) includes a plurality of gate lines, {Gn}, spatially arranged along a row direction; a plurality of data lines, {Dm}, spatially arranged along a column direction perpendicular to the row direction, and a plurality of pixels, {Pn,m}, spatially arranged in the form of a matrix, where m=1, 2, . . . , M, n=1, 2, . . . , N, and M and N are positive integers. Each pixel Pn,m is defined between two neighboring gate lines Gn and Gn+1 and two neighboring data lines Dm and Dm+1, and comprises a first sub-pixel electrode, a second sub-pixel electrode, a first transistor having a gate electrically coupled to the gate line Gn+1, a source and a drain electrically coupled to the first sub-pixel electrode, a second transistor having a gate electrically coupled to the gate line Gn, a source electrically coupled to the source of the first transistor and a drain electrically coupled to the second sub-pixel electrode, and a third transistor having a gate electrically coupled to the gate line Gn+2, a source electrically coupled to one of the two neighboring data lines Dm and Dm+1 and a drain electrically coupled to the sources of the first and second transistors.

摘要翻译： 液晶显示器（LCD）及其驱动方法。 在一个实施例中，LCD）包括沿着行方向在空间上排列的多条栅极线{Gn} 沿垂直于行方向的列方向空间排列的多条数据线{Dm}，以矩阵形式空间排列的多个像素{Pn，m}，其中m = 1,2， 。 。 。 ，M，n = 1,2。 。 。 ，N和M和N是正整数。 每个像素Pn，m定义在两个相邻的栅极线Gn和Gn + 1以及两个相邻的数据线Dm和Dm + 1之间，并且包括第一子像素电极，第二子像素电极，具有栅极的第一晶体管 电耦合到栅极线Gn + 1，电耦合到第一子像素电极的源极和漏极，具有电耦合到栅极线Gn的栅极的第二晶体管，电耦合到第一晶体管的源极的源极 以及漏极，电耦合到第二子像素电极，以及第三晶体管，其具有电耦合到栅极线Gn + 2的栅极，电耦合到两个相邻数据线Dm和Dm + 1中的一个的源极和漏极 电耦合到第一和第二晶体管的源极。

公开(公告)号：US20100079427A1

公开(公告)日：2010-04-01

申请号：US12328771

申请日：2008-12-05

申请人： Jing-Tin Kuo ,  Chao-Liang Lu ,  Kuo-Hsien Lee

发明人： Jing-Tin Kuo ,  Chao-Liang Lu ,  Kuo-Hsien Lee

IPC分类号： G06F3/038 ,  G09G3/36

CPC分类号： G09G3/3655 ,  G09G3/3648 ,  G09G2300/0426

摘要： A pixel array, a method for driving the same, and a display panel are provided. The pixel array includes a number of pixel sets, each of which includes a first scan line, a second scan line, a data line, a first active device electrically connected to the first scan line and the data line, a second active device electrically connected to the second scan line and the first active device, a first pixel electrode, a second pixel electrode, a first common electrode line, and a second common electrode line. The first pixel electrode and the second pixel electrode are electrically connected to the first active device and the second active device, respectively. The first common electrode line is disposed under the first pixel electrode and electrically connected to a direct current. The second common electrode line is disposed under the second pixel electrode and electrically connected to an alternating current.

摘要翻译： 提供像素阵列，其驱动方法和显示面板。 像素阵列包括多个像素组，每个像素组包括第一扫描线，第二扫描线，数据线，电连接到第一扫描线和数据线的第一有源器件，电连接的第二有源器件 第二扫描线和第一有源器件，第一像素电极，第二像素电极，第一公共电极线和第二公共电极线。 第一像素电极和第二像素电极分别电连接到第一有源器件和第二有源器件。 第一公共电极线设置在第一像素电极下方并与直流电连接。 第二公共电极线设置在第二像素电极下方并且电连接到交流电。

公开(公告)号：US08207952B2

公开(公告)日：2012-06-26

申请号：US12328771

申请日：2008-12-05

申请人： Jing-Tin Kuo ,  Chao-Liang Lu ,  Kuo-Hsien Lee

发明人： Jing-Tin Kuo ,  Chao-Liang Lu ,  Kuo-Hsien Lee

IPC分类号： G06F3/038

CPC分类号： G09G3/3655 ,  G09G3/3648 ,  G09G2300/0426

摘要： A pixel array, a method for driving the same, and a display panel are provided. The pixel array includes a number of pixel sets, each of which includes a first scan line, a second scan line, a data line, a first active device electrically connected to the first scan line and the data line, a second active device electrically connected to the second scan line and the first active device, a first pixel electrode, a second pixel electrode, a first common electrode line, and a second common electrode line. The first pixel electrode and the second pixel electrode are electrically connected to the first active device and the second active device, respectively. The first common electrode line is disposed under the first pixel electrode and electrically connected to a direct current. The second common electrode line is disposed under the second pixel electrode and electrically connected to an alternating current.

摘要翻译： 提供像素阵列，其驱动方法和显示面板。 像素阵列包括多个像素组，每个像素组包括第一扫描线，第二扫描线，数据线，电连接到第一扫描线和数据线的第一有源器件，电连接的第二有源器件 第二扫描线和第一有源器件，第一像素电极，第二像素电极，第一公共电极线和第二公共电极线。 第一像素电极和第二像素电极分别电连接到第一有源器件和第二有源器件。 第一公共电极线设置在第一像素电极下方并与直流电连接。 第二公共电极线设置在第二像素电极下方并且电连接到交流电。

公开(公告)号：US07982219B2

公开(公告)日：2011-07-19

申请号：US12575483

申请日：2009-10-08

申请人： Jing-Tin Kuo ,  Kuo-Hsien Lee

发明人： Jing-Tin Kuo ,  Kuo-Hsien Lee

IPC分类号： H01L29/04

CPC分类号： G09G3/3659 ,  G09G3/2074 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2310/0205 ,  H01L27/12 ,  H01L27/124

摘要： A pixel array includes scan lines, data lines, and pixels. Each pixel arranged in the nth row includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. In the first sub-pixel, a first gate and a first drain of a first transistor are connected to the (n−1)th scan line and a first pixel electrode, respectively. In the second sub-pixel, a second gate of a second transistor is connected to the nth scan line, and a second drain is connected to a second pixel electrode and a first source of the first transistor. In the third sub-pixel, a third gate of a third transistor is connected to the (n+1)th scan line, a third drain is connected to a third pixel electrode and a second source of the second transistor, and a third source is connected to one of the data lines.

摘要翻译： 像素阵列包括扫描线，数据线和像素。 排列在第n行的每个像素包括第一子像素，第二子像素和第三子像素。 在第一子像素中，第一晶体管的第一栅极和第一漏极分别连接到第（n-1）扫描线和第一像素电极。 在第二子像素中，第二晶体管的第二栅极连接到第n扫描线，第二漏极连接到第一晶体管的第二像素电极和第一源极。 在第三子像素中，第三晶体管的第三栅极连接到第（n + 1）扫描线，第三漏极连接到第三像素电极和第二晶体管的第二源极，第三源极 连接到其中一条数据线。

公开(公告)号：US20110080376A1

公开(公告)日：2011-04-07

申请号：US12618780

申请日：2009-11-16

申请人： Jing-Tin Kuo ,  Mei-Sheng Ma ,  Kuo-Hsien Lee

发明人： Jing-Tin Kuo ,  Mei-Sheng Ma ,  Kuo-Hsien Lee

IPC分类号： G06F3/043 ,  G06F3/041

CPC分类号： G06F3/0436 ,  G02F1/13338 ,  G06F3/0412 ,  G06F2203/04107

摘要： A touch display panel including a first substrate, a touch sensing device, and a display medium layer is provided. The first substrate has a display area and a non-display area located outside the display area. The touch sensing device may be directly disposed on the first substrate and located within the non-display area, wherein the touch sensing device is consisted of two or more groups of receiving elements. The display medium layer is disposed in the display area.

摘要翻译： 提供了包括第一基板，触摸感测装置和显示介质层的触摸显示面板。 第一基板具有位于显示区域外部的显示区域和非显示区域。 触摸感测装置可以直接设置在第一基板上并且位于非显示区域内，其中触摸感测装置由两组或多组接收元件组成。 显示介质层设置在显示区域中。

公开(公告)号：US20110017994A1

公开(公告)日：2011-01-27

申请号：US12575483

申请日：2009-10-08

申请人： Jing-Tin Kuo ,  Kuo-Hsien Lee

发明人： Jing-Tin Kuo ,  Kuo-Hsien Lee

IPC分类号： H01L27/12

CPC分类号： G09G3/3659 ,  G09G3/2074 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2310/0205 ,  H01L27/12 ,  H01L27/124

摘要： A pixel array includes scan lines, data lines, and pixels. Each pixel arranged in the nth row includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. In the first sub-pixel, a first gate and a first drain of a first transistor are connected to the (n−1)th scan line and a first pixel electrode, respectively. In the second sub-pixel, a second gate of a second transistor is connected to the nth scan line, and a second drain is connected to a second pixel electrode and a first source of the first transistor. In the third sub-pixel, a third gate of a third transistor is connected to the (n+1)th scan line, a third drain is connected to a third pixel electrode and a second source of the second transistor, and a third source is connected to one of the data lines.

摘要翻译： 像素阵列包括扫描线，数据线和像素。 排列在第n行的每个像素包括第一子像素，第二子像素和第三子像素。 在第一子像素中，第一晶体管的第一栅极和第一漏极分别连接到第（n-1）扫描线和第一像素电极。 在第二子像素中，第二晶体管的第二栅极连接到第n扫描线，第二漏极连接到第一晶体管的第二像素电极和第一源极。 在第三子像素中，第三晶体管的第三栅极连接到第（n + 1）扫描线，第三漏极连接到第三像素电极和第二晶体管的第二源极，第三源极 连接到其中一条数据线。

公开(公告)号：US07848477B2

公开(公告)日：2010-12-07

申请号：US12407167

申请日：2009-03-19

申请人： Kuo-Hsing Cheng ,  Wai-Pan Wu ,  Kuo-Hsien Lee ,  Chun-Huai Li

发明人： Kuo-Hsing Cheng ,  Wai-Pan Wu ,  Kuo-Hsien Lee ,  Chun-Huai Li

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2320/043

摘要： A shift register including shift register units substantially cascaded is disclosed. Each shift register unit is controlled by first and second clock signals opposite to each other for generating an output signal. Each shift register unit includes first and second switch devices and first and second devices. The first switch device provides the output signal through an output node. The first driving device drives the first switch device according to a first input signal to activate the output signal. The second driving device provides a first voltage signal, according to the first clock signal, to drive the first switch device and de-activate the output signal. When the first switch device de-activates the output signal, the second switch device provides the second voltage signal to the output node according to the second clock signal. A level of the first voltage signal is lower than a level of the second voltage signal.

摘要翻译： 公开了一种包括基本级联的移位寄存器单元的移位寄存器。 每个移位寄存器单元由彼此相对的第一和第二时钟信号控制，以产生输出信号。 每个移位寄存器单元包括第一和第二开关器件以及第一和第二器件。 第一开关装置通过输出节点提供输出信号。 第一驱动装置根据第一输入信号驱动第一开关装置以激活输出信号。 第二驱动装置根据第一时钟信号提供第一电压信号以驱动第一开关装置并且去激活输出信号。 当第一开关装置断开输出信号时，第二开关装置根据第二时钟信号向输出节点提供第二电压信号。 第一电压信号的电平低于第二电压信号的电平。

公开(公告)号：US20100172461A1

公开(公告)日：2010-07-08

申请号：US12407167

申请日：2009-03-19

申请人： Kuo-Hsing Cheng ,  Wai-Pan Wu ,  Kuo-Hsien Lee ,  Chun-Huai Li

发明人： Kuo-Hsing Cheng ,  Wai-Pan Wu ,  Kuo-Hsien Lee ,  Chun-Huai Li

IPC分类号： G11C19/28

CPC分类号： G11C19/28 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2320/043

摘要： A shift register including shift register units substantially cascaded is disclosed. Each shift register unit is controlled by first and second clock signals opposite to each other for generating an output signal. Each shift register unit includes first and second switch devices and first and second devices. The first switch device provides the output signal through an output node. The first driving device drives the first switch device according to a first input signal to activate the output signal. The second driving device provides a first voltage signal, according to the first clock signal, to drive the first switch device and de-activate the output signal. When the first switch device de-activates the output signal, the second switch device provides the second voltage signal to the output node according to the second clock signal. A level of the first voltage signal is lower than a level of the second voltage signal.

摘要翻译： 公开了一种包括基本级联的移位寄存器单元的移位寄存器。 每个移位寄存器单元由彼此相对的第一和第二时钟信号控制，以产生输出信号。 每个移位寄存器单元包括第一和第二开关器件以及第一和第二器件。 第一开关装置通过输出节点提供输出信号。 第一驱动装置根据第一输入信号驱动第一开关装置以激活输出信号。 第二驱动装置根据第一时钟信号提供第一电压信号以驱动第一开关装置并且去激活输出信号。 当第一开关装置断开输出信号时，第二开关装置根据第二时钟信号向输出节点提供第二电压信号。 第一电压信号的电平低于第二电压信号的电平。