公开(公告)号：US20210098352A1

公开(公告)日：2021-04-01

申请号：US16912653

申请日：2020-06-25

申请人： Jiun Hann Sir ,  Eng Huat Goh ,  Poh Boon Khoo

发明人： Jiun Hann Sir ,  Eng Huat Goh ,  Poh Boon Khoo

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/552

摘要： A molded frame interconnect includes power, ground and signal frame interconnects in a molded mass, that encloses an integrated-circuit package precursor, which is inserted into the frame, and coupled to the frame interconnects by a build-up redistribution layer.

公开(公告)号：US20210057318A1

公开(公告)日：2021-02-25

申请号：US16912595

申请日：2020-06-25

申请人： Jiun Hann Sir ,  Poh Boon Khoo ,  Eng Huat Goh

发明人： Jiun Hann Sir ,  Poh Boon Khoo ,  Eng Huat Goh

IPC分类号： H01L23/498 ,  H01L21/48 ,  H05K3/34

摘要： Disclosed embodiments include folded, top-to-bottom interconnects that couple a die side of an integrated-circuit package substrate, to a board as a complement to a ball-grid array for a flip-chip-mounted integrated-circuit die on the die side. The folded, top-to-bottom interconnect is in a molded frame that forms a perimeter around an infield to receive at least one flip-chip IC die. Power, ground and I/O interconnections shunt around the package substrate, and such shunting includes voltage regulation that need not be routed through the package substrate.