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    SYSTEM FOR SYNCHRONIZING CLOCK
    1.
    发明申请
    SYSTEM FOR SYNCHRONIZING CLOCK 有权
    用于同步时钟的系统

    公开(公告)号：US20100329404A1

    公开(公告)日：2010-12-30

    申请号：US12872138

    申请日：2010-08-31

    申请人： Jiying Xiang ,  Zongan Li

    发明人： Jiying Xiang ,  Zongan Li

    IPC分类号： H04L7/00

    CPC分类号： H04J3/0685

    摘要： A system for synchronizing clock, which is used to realize the synchronization between a radio frequency module and a base band module in a base station, comprises: one or more time generators, located on the radio frequency module side, configured to generate a synchronous signal according to an external clock signal, and to send the synchronous signal to a time distributor; the time distributor, located on the base band module side, configured to generate a synchronous clock according to a synchronous signal from one of the one or more time generators, and to adjust the synchronous clock according to a communication delay between the time generator which outputs the synchronous signal and the time distributor, and to send the synchronous clock adjusted to the radio frequency module and the base band module to realize the synchronization between the radio frequency module and the base band module.

    摘要翻译： 一种同步时钟的系统，用于实现基站中的射频模块与基带模块之间的同步，包括：位于射频模块侧的一个或多个时间发生器，被配置为产生同步信号 根据外部时钟信号，并将同步信号发送到时间分配器; 位于基带模块侧的时间分配器被配置为根据来自一个或多个时间发生器之一的同步信号产生同步时钟，并且根据输出的时间发生器之间的通信延迟来调整同步时钟 同步信号和时间分配器，并发送调整到射频模块和基带模块的同步时钟，实现射频模块与基带模块之间的同步。

    System for synchronizing clock
    2.
    发明授权
    System for synchronizing clock 有权
    用于同步时钟的系统

    公开(公告)号：US08654796B2

    公开(公告)日：2014-02-18

    申请号：US12872138

    申请日：2010-08-31

    申请人： Jiying Xiang ,  Zongan Li

    发明人： Jiying Xiang ,  Zongan Li

    IPC分类号： H04J3/06 ,  H04J3/12 ,  H04L7/00

    CPC分类号： H04J3/0685

    摘要： A system for synchronizing clock, which is used to realize the synchronization between a radio frequency module and a base band module in a base station, comprises: one or more time generators, located on the radio frequency module side, configured to generate a synchronous signal according to an external clock signal, and to send the synchronous signal to a time distributor; the time distributor, located on the base band module side, configured to generate a synchronous clock according to a synchronous signal from one of the one or more time generators, and to adjust the synchronous clock according to a communication delay between the time generator which outputs the synchronous signal and the time distributor, and to send the synchronous clock adjusted to the radio frequency module and the base band module to realize the synchronization between the radio frequency module and the base band module.

    摘要翻译： 一种同步时钟的系统，用于实现基站中的射频模块与基带模块之间的同步，包括：位于射频模块侧的一个或多个时间发生器，被配置为产生同步信号 根据外部时钟信号，并将同步信号发送到时间分配器; 位于基带模块侧的时间分配器被配置为根据来自一个或多个时间发生器之一的同步信号产生同步时钟，并且根据输出的时间发生器之间的通信延迟来调整同步时钟 同步信号和时间分配器，并发送调整到射频模块和基带模块的同步时钟，实现射频模块与基带模块之间的同步。