公开(公告)号：US4639683A

公开(公告)日：1987-01-27

申请号：US827236

申请日：1986-02-07

申请人： Lewis W. Counts ,  JoAnn P. Close

发明人： Lewis W. Counts ,  JoAnn P. Close

IPC分类号： H03F3/30 ,  H03F3/45

CPC分类号： H03F3/45286 ,  H03F3/3071

摘要： A monolithic IC chip having a differential amplifier comprising a pair of JFETs with their top and back gates electrically isolated to provide a low-leakage-current input to the top gates. The amplifier includes independent bias circuitry for setting the potentials of the JFET back gates to a level close to that of the top gates. This circuitry includes resistive means coupled to the source electrodes of the input JFETs, and operable to establish a low-noise bias point for the back gates. The bias circuitry includes a reference current source comprising a pair of JFETs identical to the input JFETs and arranged to provide a gate-to-source voltage to match that of the input JFETs.

摘要翻译： 一种具有差分放大器的单片IC芯片，该差分放大器包括一对JFET，其顶部和后部栅极电隔离，以向顶部栅极提供低漏电流输入。 放大器包括独立的偏置电路，用于将JFET背栅的电位设置为接近顶栅的电位。 该电路包括耦合到输入JFET的源电极的电阻装置，并且可操作以建立用于后门的低噪声偏置点。 偏置电路包括参考电流源，其包括与输入JFET相同的一对JFET，并且被布置为提供与输入JFET的栅极至源极电压匹配的栅极至源极电压。

公开(公告)号：US06518842B1

公开(公告)日：2003-02-11

申请号：US10165496

申请日：2002-06-07

申请人： Nathan Carter ,  JoAnn P. Close

发明人： Nathan Carter ,  JoAnn P. Close

IPC分类号： H03F345

CPC分类号： H03F3/72 ,  H03F3/45112 ,  H03F3/4556

摘要： A bipolar rail-to-rail input stage includes complementary differential input pairs, and a switching circuit which makes one or the other of the input pairs active depending on the relationship between a transition threshold voltage Vth and the common mode input voltage Vcm. A transition threshold voltage selection circuit provides a selectable one of at least two different Vth voltages to the switching circuit in response to a select signal. In one embodiment, the select signal has logic “high”, logic “low”, and “floating” states. The transition threshold voltage selection circuit provides a first Vth voltage when the select signal is in a first state, a second Vth voltage when the select signal is in a second state, and disables the input stage when the select signal is in a third state.

摘要翻译： 双极轨到轨输入级包括互补差分输入对，以及根据转变阈值电压Vth和共模输入电压Vcm之间的关系使一个或另一个输入对有效的开关电路。 转换阈值电压选择电路响应于选择信号向开关电路提供至少两个不同Vth电压中的可选择的一个。 在一个实施例中，选择信号具有逻辑“高”，逻辑“低”和“浮动”状态。 当选择信号处于第一状态时，转换阈值电压选择电路提供第一Vth电压，当选择信号处于第二状态时，提供第二Vth电压，并且当选择信号处于第三状态时禁止输入级。

公开(公告)号：US06262633B1

公开(公告)日：2001-07-17

申请号：US09560305

申请日：2000-04-27

申请人： JoAnn P. Close

发明人： JoAnn P. Close

IPC分类号： H03F326

CPC分类号： H03F1/3217 ,  H03F3/3066 ,  H03F3/45152 ,  H03F2203/45106 ,  H03F2203/45544 ,  H03F2203/45612

摘要： A rail-to-rail op amp output stage is configured to provide one or more additional base drive paths for each of its output transistors, reducing the stage's distortion and increasing its maximum output current without substantially increasing quiescent current. The additional base drive paths reduce the demand on the transistors driving the output transistors, lowering the distortion they might otherwise contribute to the output current. In a preferred embodiment, the collectors of the stage's clamp transistors are connected to the bases of their opposing output transistors, so that each clamp transistor provides an additional base drive path to a respective output transistor, thereby increasing maximum output current without substantially increasing quiescent current, and substantially reducing crossover distortion.

摘要翻译： 轨至轨运算放大器输出级被配置为为其每个输出晶体管提供一个或多个附加的基极驱动路径，从而降低了该级的失真并增加了其最大输出电流，而基本上不增加静态电流。 附加的基极驱动路径减少了对驱动输出晶体管的晶体管的需求，降低了它们可能对输出电流有贡献的失真。 在优选实施例中，级的钳位晶体管的集电极连接到它们相对的输出晶体管的基极，使得每个钳位晶体管提供到相应的输出晶体管的额外的基极驱动路径，从而增加最大输出电流而基本上不增加静态电流 ，并大大减少交叉失真。