Current mirror circuit
    1.
    发明授权
    Current mirror circuit 有权
    电流镜电路

    公开(公告)号:US06278326B1

    公开(公告)日:2001-08-21

    申请号:US09692370

    申请日:2000-10-19

    IPC分类号: H03F304

    摘要: A current mirror circuit in accordance with the present invention overcomes many shortcomings of the prior art. A current mirror circuit for providing a current reference signal suitably includes at least one degeneration resistor to provide more degeneration for lower voltage noise while also including at least one clamping device to preventing saturation of the current mirror. The clamping device suitably comprises at least one diode, such as, for example, a Schottky-type diode. Moreover, the clamping device can be suitably configured to facilitate a higher slew rate of the current mirror circuit.

    摘要翻译: 根据本发明的电流镜电路克服了现有技术的许多缺点。 用于提供电流参考信号的电流镜电路适当地包括至少一个退化电阻器,以为较低电压噪声提供更多的退化,同时还包括至少一个钳位装置以防止电流镜的饱和。 钳位装置适当地包括至少一个二极管,例如肖特基型二极管。 此外,夹持装置可以适当地构造成有助于电流镜电路的更高的转换速率。

    Bias rail buffer circuit and method
    2.
    发明授权
    Bias rail buffer circuit and method 有权
    偏置轨道缓冲电路及方法

    公开(公告)号:US06297699B1

    公开(公告)日:2001-10-02

    申请号:US09692017

    申请日:2000-10-19

    IPC分类号: H03F326

    摘要: A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

    摘要翻译: 根据本发明的偏轨缓冲电路和方法克服了现有技术的许多缺点。 用于提供参考信号的偏置轨缓冲电路被适当地配置为吸收出现在输出参考信号上的外部干扰。 用于吸收出现在输出参考信号处的外部干扰的方法适当地包括使用互补晶体管来根据外部干扰是否对输出参考信号提供减小或增加而将电流和电流吸收到所述输出参考信号 。 偏置轨缓冲电路适当地包括输入晶体管,第一对互补晶体管和第二对互补晶体管,使得第二对互补晶体管操作以源电流和吸收电流以吸收施加在所述输出参考信号上的外部干扰 。

    Wideband operational amplifier
    3.
    发明授权
    Wideband operational amplifier 有权
    宽带运算放大器

    公开(公告)号:US6163216A

    公开(公告)日:2000-12-19

    申请号:US215402

    申请日:1998-12-18

    IPC分类号: H03F3/30 H03F3/343 H03F3/45

    摘要: A wideband operational amplifier in accordance with the present invention overcomes many shortcomings of the prior art. A wideband operational amplifier may be configured to provide a high output voltage and high output current. The amplifier may comprise an input stage having a first input buffer and a second input buffer, and an output stage amplifier having an output buffer. The input stage may also include current mirrors configured to facilitate a lower input offset voltage and lower input voltage noise. Moreover, the operational amplifier may also provide a wide common-mode input range and full power bandwidth simultaneously.

    摘要翻译: 根据本发明的宽带运算放大器克服了现有技术的许多缺点。 宽带运算放大器可以被配置为提供高输出电压和高输出电流。 放大器可以包括具有第一输入缓冲器和第二输入缓冲器的输入级,以及具有输出缓冲器的输出级放大器。 输入级还可以包括配置成便于较低输入偏移电压和较低输入电压噪声的电流镜。 此外,运算放大器还可以同时提供宽的共模输入范围和全功率带宽。

    Single loop output common mode feedback circuit for high performance class AB differential amplifier
    4.
    发明授权
    Single loop output common mode feedback circuit for high performance class AB differential amplifier 有权
    用于高性能AB类差分放大器的单回路输出共模反馈电路

    公开(公告)号:US06459338B1

    公开(公告)日:2002-10-01

    申请号:US09863692

    申请日:2001-05-23

    IPC分类号: H03F345

    摘要: A class AB input differential amplifier employs a single loop output common mode feedback circuit (CMFC) to achieve high performance by controlling the common mode output voltage. The CMFC includes a small amplifier to compare the common mode voltage at the output with a desired voltage specified at the common mode output voltage pin. Having only one loop to control this voltage instead of two makes the design more reliable and easier to compensate since there is no need to worry about how multiple loops will interact.

    摘要翻译: AB类输入差分放大器采用单回路输出共模反馈电路(CMFC),通过控制共模输出电压实现高性能。 CMFC包括一个小型放大器,用于将输出端的共模电压与共模输出电压引脚上规定的所需电压进行比较。 只有一个环路来控制这个电压而不是两个电路使得设计更加可靠和更容易补偿,因为不需要担心多个环路如何交互。

    Method for bias rail buffering
    5.
    发明授权
    Method for bias rail buffering 有权
    斜轨缓冲方法

    公开(公告)号:US06429744B2

    公开(公告)日:2002-08-06

    申请号:US09904806

    申请日:2001-07-13

    IPC分类号: H03F326

    摘要: A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

    摘要翻译: 根据本发明的偏轨缓冲电路和方法克服了现有技术的许多缺点。 用于提供参考信号的偏置轨缓冲电路被适当地配置为吸收出现在输出参考信号上的外部干扰。 用于吸收出现在输出参考信号处的外部干扰的方法适当地包括使用互补晶体管来根据外部干扰是否对输出参考信号提供减小或增加而将电流和电流吸收到所述输出参考信号 。 偏置轨缓冲电路适当地包括输入晶体管,第一对互补晶体管和第二对互补晶体管,使得第二对互补晶体管操作以源电流和吸收电流以吸收施加在所述输出参考信号上的外部干扰 。

    High output current operational amplifier output stage
    6.
    发明授权
    High output current operational amplifier output stage 有权
    高输出电流运算放大器输出级

    公开(公告)号:US06262633B1

    公开(公告)日:2001-07-17

    申请号:US09560305

    申请日:2000-04-27

    申请人: JoAnn P. Close

    发明人: JoAnn P. Close

    IPC分类号: H03F326

    摘要: A rail-to-rail op amp output stage is configured to provide one or more additional base drive paths for each of its output transistors, reducing the stage's distortion and increasing its maximum output current without substantially increasing quiescent current. The additional base drive paths reduce the demand on the transistors driving the output transistors, lowering the distortion they might otherwise contribute to the output current. In a preferred embodiment, the collectors of the stage's clamp transistors are connected to the bases of their opposing output transistors, so that each clamp transistor provides an additional base drive path to a respective output transistor, thereby increasing maximum output current without substantially increasing quiescent current, and substantially reducing crossover distortion.

    摘要翻译: 轨至轨运算放大器输出级被配置为为其每个输出晶体管提供一个或多个附加的基极驱动路径,从而降低了该级的失真并增加了其最大输出电流,而基本上不增加静态电流。 附加的基极驱动路径减少了对驱动输出晶体管的晶体管的需求,降低了它们可能对输出电流有贡献的失真。 在优选实施例中,级的钳位晶体管的集电极连接到它们相对的输出晶体管的基极,使得每个钳位晶体管提供到相应的输出晶体管的额外的基极驱动路径,从而增加最大输出电流而基本上不增加静态电流 ,并大大减少交叉失真。

    Comparator
    8.
    发明申请
    Comparator 有权
    比较器

    公开(公告)号:US20030222681A1

    公开(公告)日:2003-12-04

    申请号:US10379540

    申请日:2003-03-06

    IPC分类号: H03K005/153

    摘要: A comparator is provided with a pair of transistors which are continuously in ON state, in which a switch unit constructed of a diode pair, for switching a current path in response to a high/low relationship between a voltage level of an input signal and a voltage level of a reference voltage, and a unit for converting a current into a voltage level are provided between emitter terminals of the transistor pair.

    摘要翻译: 比较器具有连续处于导通状态的一对晶体管,其中由二极管对构成的开关单元用于响应于输入信号的电压电平和 参考电压的电压电平和用于将电流转换成电压电平的单元设置在晶体管对的发射极端子之间。

    Output stage amplifier with compensation circuitry
    9.
    发明授权
    Output stage amplifier with compensation circuitry 有权
    输出级放大器,带补偿电路

    公开(公告)号:US06552613B2

    公开(公告)日:2003-04-22

    申请号:US10209767

    申请日:2002-07-31

    IPC分类号: H03F345

    摘要: An output stage amplifier circuit in accordance with the present invention overcomes many shortcomings of the prior art. A output stage amplifier circuit for providing a high output voltage and current reference signal suitably includes an output buffer configured with a compensation circuit for reducing disturbances introduced into the output stage amplifier circuit by voltage supply rails, such as parasitic ringing and other disturbances. The compensation circuit can suitably comprise a first compensation device, such as at least one capacitor, and a second compensation device, such as at least one capacitor. The compensation devices are suitably coupled between an input terminal of the output stage amplifier circuit and a pair of transistors proximate a pair of output transistors of the output stage amplifier circuit, and are configured to provide “pole-zero” compensation to the output stage amplifier circuit.

    摘要翻译: 根据本发明的输出级放大器电路克服了现有技术的许多缺点。 用于提供高输出电压和电流参考信号的输出级放大器电路适当地包括配置有补偿电路的输出缓冲器,用于通过诸如寄生振铃和其他干扰的电压供应轨道减小引入到输出级放大器电路中的干扰。 补偿电路可以适当地包括诸如至少一个电容器的第一补偿装置和诸如至少一个电容器的第二补偿装置。 补偿装置适当地耦合在输出级放大器电路的输入端和靠近输出级放大器电路的一对输出晶体管的一对晶体管之间,并且被配置为向输出级放大器提供“极零”补偿 电路。

    Output stage amplifier with compensation circuitry
    10.
    发明申请
    Output stage amplifier with compensation circuitry 有权
    输出级放大器,带补偿电路

    公开(公告)号:US20020190794A1

    公开(公告)日:2002-12-19

    申请号:US10209767

    申请日:2002-07-31

    IPC分类号: H03F003/45

    摘要: A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

    摘要翻译: 根据本发明的偏轨缓冲电路和方法克服了现有技术的许多缺点。 用于提供参考信号的偏置轨缓冲电路被适当地配置为吸收出现在输出参考信号上的外部干扰。 用于吸收出现在输出参考信号处的外部干扰的方法适当地包括使用互补晶体管来根据外部干扰是否对输出参考信号提供减小或增加而将电流和电流吸收到所述输出参考信号 。 偏置轨缓冲电路适当地包括输入晶体管,第一对互补晶体管和第二对互补晶体管,使得第二对互补晶体管操作以源电流和吸收电流以吸收施加在所述输出参考信号上的外部干扰 。