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公开(公告)号：US20240322763A1
公开(公告)日：2024-09-26
申请号：US18678703
申请日：2024-05-30
发明人： Joseph Sankman
摘要： An amplifier includes a first stage and a second stage. The first stage includes a first output and a second output. The second stage includes an output, a first transistor and a second transistor. The first transistor includes a drain coupled to the first output of the first stage, and a source coupled to the output of the second stage. The second transistor includes a drain coupled to the second output of the first stage, and a gate coupled to the output of the second stage.
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公开(公告)号：US20240120822A1
公开(公告)日：2024-04-11
申请号：US18276192
申请日：2022-02-10
CPC分类号： H02M1/0006 , H02M1/0012 , H02M1/0025 , H02M1/08 , H03F3/303
摘要： Disclosed is a circuit (100) for a medical device, comprising: —a voltage converter (110, 300) which is configured to provide at least one supply potential (HV) depending on a control signal (302, PWM) provided to the voltage converter (110, 300), —a control unit (P) which is configured to provide the control signal (302, PWM) for the voltage converter (110, 300), —a signal source (TCA, 400) which is powered by the at least one supply potential (+HV) and which is configured to provide an output signal at an output of the signal source (TCA, 400), wherein the signal source (TCA, 400) is configured to provide the output signal dependent on an input signal (120) at an input of the signal source (TCA, 400), —wherein the control unit (P) comprises: —a prediction unit (160) which is configured to predict a change in the characteristic of the output signal based on at least one of a) at least one value of the input signal and b) at least one detected value of the output signal, and —an adjusting unit (160) which is configured to adjust the control signal (302, PWM) based on the predicted change in the characteristic of the output signal.
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公开(公告)号：US20230238929A1
公开(公告)日：2023-07-27
申请号：US17927059
申请日：2020-09-10
发明人： Yasuaki OTA
CPC分类号： H03F3/45179 , H03F3/301 , H03F1/223
摘要： In the amplifier circuit, the rising settling time and the falling settling time are kept short. The amplifier circuit includes a first transistor of a first conductivity type having a first control terminal; a second transistor of a second conductivity type different from the first conductivity type, the second transistor having a second control terminal connected to an input terminal and a fourth current terminal connected to the first control terminal; a third transistor; and a fourth transistor of a fourth conductivity type different from the first conductivity type, the fourth transistor having a fourth control terminal connected to the first control terminal at an equal potential, and a seventh current terminal connected to a third fixed potential.
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公开(公告)号：US11621684B2
公开(公告)日：2023-04-04
申请号：US17076864
申请日：2020-10-22
摘要： Memories for receiving or transmitting voltage signals might include an input or output buffer including a first stage having first and second inputs and configured to generate a current sink and source at its first and second outputs responsive to a voltage difference between its first and second inputs, and a second stage having a first input connected to the first output of the first stage, a second input connected to the second output of the first stage, a first voltage signal node connected to its first input through a first resistance, and a second voltage signal node connected to its second input through a second resistance, wherein a first inverter is connected in parallel with the first resistance, a second inverter is connected in parallel with the second resistance, and a pair of cross-coupled inverters are connected between the first voltage signal node and the second voltage signal node.
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公开(公告)号：US11509270B2
公开(公告)日：2022-11-22
申请号：US17102806
申请日：2020-11-24
申请人： pSemi Corporation
发明人： Jaroslaw Adamski
摘要： Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.
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公开(公告)号：US20220345096A1
公开(公告)日：2022-10-27
申请号：US17741130
申请日：2022-05-10
申请人： pSemi Corporation
发明人： Emre Ayranci , Miles Sanner , Phanindra Yerramilli
摘要： A receiver topology for supporting various combinations of interband carrier aggregation (CA) signals, intraband non-contiguous CA and non-CA signals having different combinations of signals aggregated therein.
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公开(公告)号：US11336243B2
公开(公告)日：2022-05-17
申请号：US17010311
申请日：2020-09-02
申请人： pSemi Corporation
发明人： Emre Ayranci , Miles Sanner , Phanindra Yerramilli
摘要： A receiver topology for supporting various combinations of interband carrier aggregation (CA) signals, intraband non-contiguous CA and non-CA signals having different combinations of signals aggregated therein.
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公开(公告)号：US11323083B2
公开(公告)日：2022-05-03
申请号：US17029125
申请日：2020-09-23
发明人： Yusuke Tokunaga
摘要： An amplifier circuit has: a first amplifier circuit, including a chopper circuit amplifying a first differential signal input between first and second input terminals to output a second differential signal; and a second amplifier circuit amplifying the second differential signal to output a single-ended signal. The second amplifier circuit includes: a first circuit including first and second transistors, the first circuit being connected to the first amplifier circuit so that the second differential signal input into gates of these transistors, the first circuit converting the second differential signal to a current flowing into a first node connected to the first transistor and a current flowing into a second node connected to the second transistor; and a second circuit negatively feeding back a voltage at the second node so that the difference in voltage between these nodes is reduced. The second amplifier circuit outputs the single-ended signal from the first node.
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公开(公告)号：US11323081B2
公开(公告)日：2022-05-03
申请号：US17078876
申请日：2020-10-23
摘要： A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.
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公开(公告)号：US11290061B2
公开(公告)日：2022-03-29
申请号：US16929124
申请日：2020-07-15
发明人： Chia-Wei Su , Ju-Lin Huang , Keko-Chun Liang
摘要： An amplifier circuit including an input amplifier, an output amplifier and a diode device is provided. The output amplifier includes a PMOSFET and an NMOSFET. The PMOSFET has a gate electrode serving as a first input end and a drain coupled to an output end. The NMOSFET has a gate electrode serving as a second input end and a drain coupled to the output end. The output amplifier outputs an output voltage at the output end, and is coupled to the input amplifier via at least one of the first and second input ends. The diode device is coupled between the output end and the at least one of the first and second input ends of the output amplifier. When a voltage difference between the output end and the at least one of the first and second input ends of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced.
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