摘要:
A method and apparatus is disclosed for controlling the application of a clock stopping signal in a processor to limit power consumption. The system controller receives addresses, signals indicative of primary and secondary system activity, and at least one nap timeout signal. Addresses are compared with fixed software interrupt addresses. Matching non-prefetched addresses trigger a nap mode. Upon nap mode triggering, the clock stopping signal may be throttled until a programmable NAP timer expires. Applying the clock stopping signal with programmable duty cycle during the throttling period ensures that processing necessary for the detection and servicing of primary and secondary activity may occur. A prefetch detect circuit ensures that fixed software interrupt addresses loaded in the middle of a prefetch do not trigger the clock stopping signal. The clock stopping signal is removed or inhibited when primary or secondary activity is detected or when a nap mode is terminated by a nap timer timing out.
摘要:
The present invention provides for a system for operating a communication device (20) for reception of scheduled intermittent information messages (22) with a dual mode timer (70) that extends battery life. A controller (50) schedules the timer (70) to power down all idle components of the device (20) between message receptions in a power saving sleep mode to conserve battery power. During active mode when the device is fully active in reception of messages, the timer (70) uses a reference oscillator (90) with a relatively high frequency to support digital processing by the receiver (26). During sleep mode when only the timer is powered on, a much lower frequency sleep oscillator (96) is used to maintain the lowest possible level of power consumption within the timer itself. The timer (70) has provision for automatic temperature calibration to compensate for timing inaccuracies inherent to the low-power low-frequency crystal oscillator (96) used for the sleep mode. The resultant improvement in timer accuracy during sleep mode eliminates the need for an initial reacquisition period following wake up in active mode, thereby reducing battery drain in active mode as well.
摘要:
Provided is a system for operating a communication device (20) for reception of scheduled intermittent information messages (22) with a dual mode timer (70) that extends battery life. A controller (50) schedules the timer (70) to power down all idle components of the device (20) between message receptions in a power saving sleep mode to conserve battery power. During active mode when the device is fully active in reception of messages, the timer (70) uses a reference oscillator (90) with a relatively high frequency to support digital processing by the receiver (26). During sleep mode when only the timer is powered on, a much lower frequency sleep oscillator (96) is used to maintain the lowest possible level of power consumption within the timer itself. The timer (70) has provision for automatic temperature calibration to compensate for timing inaccuracies inherent to the low-power low-frequency crystal oscillator (96) used for the sleep mode. The resultant improvement in timer accuracy during sleep mode eliminates the need for an initial reacquisition period following wake up in active mode, thereby reducing battery drain in active mode as well.